A. H. M. Shirazi, Amir Nikpaik, S. Mirabbasi, S. Shekhar
{"title":"A quad-core-coupled triple-push 295-to-301 GHz source with 1.25 mW peak output power in 65nm CMOS using slow-wave effect","authors":"A. H. M. Shirazi, Amir Nikpaik, S. Mirabbasi, S. Shekhar","doi":"10.1109/RFIC.2016.7508283","DOIUrl":null,"url":null,"abstract":"Achieving high output power in (sub-)THz voltage-controlled oscillators (VCOs) has been a severe design challenge in CMOS technology. In this work, an architecture for coupled terahertz (THz) VCOs is presented. The architecture utilizes four coupled triple-push VCOs and combines the generated third harmonic currents using slow-wave coplanar waveguide (S-CPW) at 300 GHz. Coupling four cores increases output power, and use of S-CPW reduces the loss and increases the quality factor of the VCO tank. It is shown that using S-CPW results in ~2.6 dB of lower loss as compared to the conventional CPW or grounded-CPW (GCPW) structures. The VCO is tuned using parasitic tuning technique and achieves 1.7% frequency tuning range (FTR). The proposed structure is designed and fabricated in a 65-nm bulk CMOS process. The measured peak output power of the 295-to-301 GHz VCO is 0.9 dBm (≈1.25 mW) at 300 GHz while consuming 235 mW (with a DC to RF efficiency of 0.52%).","PeriodicalId":163595,"journal":{"name":"2016 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"183 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-05-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"19","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RFIC.2016.7508283","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 19
Abstract
Achieving high output power in (sub-)THz voltage-controlled oscillators (VCOs) has been a severe design challenge in CMOS technology. In this work, an architecture for coupled terahertz (THz) VCOs is presented. The architecture utilizes four coupled triple-push VCOs and combines the generated third harmonic currents using slow-wave coplanar waveguide (S-CPW) at 300 GHz. Coupling four cores increases output power, and use of S-CPW reduces the loss and increases the quality factor of the VCO tank. It is shown that using S-CPW results in ~2.6 dB of lower loss as compared to the conventional CPW or grounded-CPW (GCPW) structures. The VCO is tuned using parasitic tuning technique and achieves 1.7% frequency tuning range (FTR). The proposed structure is designed and fabricated in a 65-nm bulk CMOS process. The measured peak output power of the 295-to-301 GHz VCO is 0.9 dBm (≈1.25 mW) at 300 GHz while consuming 235 mW (with a DC to RF efficiency of 0.52%).