A. Townley, Paul Swirhun, D. Titz, A. Bisognin, F. Gianesello, R. Pilard, C. Luxey, A. Niknejad
{"title":"A 94GHz 4TX-4RX phased-array for FMCW radar with integrated LO and flip-chip antenna package","authors":"A. Townley, Paul Swirhun, D. Titz, A. Bisognin, F. Gianesello, R. Pilard, C. Luxey, A. Niknejad","doi":"10.1109/RFIC.2016.7508309","DOIUrl":null,"url":null,"abstract":"A prototype phased-array IC with four transmitters, four receivers, and integrated LO generation was designed and fabricated in a 130nm SiGe BiCMOS technology. Including LO phase shifter power consumption, the transmit array consumes 71mW per element with a per-element output power of +6.4dBm at 94GHz. The receiver array consumes 56mW per element, and achieves an RX element noise figure of 12.5dB at 94GHz. Integrated LO generation includes a 47GHz VCO, 2× frequency multiplier, 94GHz LO buffers, and a 32× CML divider chain. The transceiver has been integrated into a flip chip antenna module with four transmit and four receive antennas, and achieves TX and RX beam steering over a scan angle range of ±20°. Including LO and bias overhead power, the array has improved per-element power consumption compared with state-of-the-art 94GHz arrays, consuming only 106mW per TX channel and 91mW per RX channel, while achieving comparable performance and levels of integration.","PeriodicalId":163595,"journal":{"name":"2016 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"19 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-05-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"19","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RFIC.2016.7508309","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 19
Abstract
A prototype phased-array IC with four transmitters, four receivers, and integrated LO generation was designed and fabricated in a 130nm SiGe BiCMOS technology. Including LO phase shifter power consumption, the transmit array consumes 71mW per element with a per-element output power of +6.4dBm at 94GHz. The receiver array consumes 56mW per element, and achieves an RX element noise figure of 12.5dB at 94GHz. Integrated LO generation includes a 47GHz VCO, 2× frequency multiplier, 94GHz LO buffers, and a 32× CML divider chain. The transceiver has been integrated into a flip chip antenna module with four transmit and four receive antennas, and achieves TX and RX beam steering over a scan angle range of ±20°. Including LO and bias overhead power, the array has improved per-element power consumption compared with state-of-the-art 94GHz arrays, consuming only 106mW per TX channel and 91mW per RX channel, while achieving comparable performance and levels of integration.