{"title":"A low power wide tange duty cycle corrector based on pulse shrinking/stretching mechanism","authors":"Poki Chen, Shi-Wei Chen, Juan-Shan Lai","doi":"10.1109/ASSCC.2007.4425730","DOIUrl":null,"url":null,"abstract":"A duty cycle corrector based on pulse shrinking/ stretching mechanism is presented. The proposed DCC has been rubricated in a TSMC 0.35mum standard CMOS process. An input duty cycle range of 30%~70% is achieved. The duty cycle error is within plusmn1.0% for the widest frequency operation range of 3MHz~60MHz ever fulfilled which makes the circuit best suited for ultra wide band applications. The chip area is merely 0.3 x 0.2 mm2 and the power consumption is 1. 1mW at 550 MHz.","PeriodicalId":186095,"journal":{"name":"2007 IEEE Asian Solid-State Circuits Conference","volume":"24 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"24","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2007 IEEE Asian Solid-State Circuits Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASSCC.2007.4425730","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 24
Abstract
A duty cycle corrector based on pulse shrinking/ stretching mechanism is presented. The proposed DCC has been rubricated in a TSMC 0.35mum standard CMOS process. An input duty cycle range of 30%~70% is achieved. The duty cycle error is within plusmn1.0% for the widest frequency operation range of 3MHz~60MHz ever fulfilled which makes the circuit best suited for ultra wide band applications. The chip area is merely 0.3 x 0.2 mm2 and the power consumption is 1. 1mW at 550 MHz.
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