Low power prescaler implementation in CMOS VLSI

Abstract

Since the performance of portable electronic products increases continuously with demand, there is a need for low power digital VLSI design. Due to limited backup time of batteries, the operating time of portable electronic products is highly restricted. So the designers now concentrate on low power rather than the speed of the device or system. We implement a frequency divider (prescaler) using different flavors like conventional CMOS logic, pass transistor logic and transmission gate logic styles. Electronic Computer Aided Design (CAD) tools like Micro wind and a DSCH are used in our simulations by which the comparison of power in each style is provided. Micro wind is used a layout editor and DSCH (Digital Schematic) is used as a schematic editor. Results show that the pass transistor logic consumes less power with minimum area and good performance. We used BSTM4 MOSFET model in 0.12 μm for experimental results.