Stability and Reliability Investigation on Fully ECL Compatible High Speed- Logic ICs.

Abstract

The electrical characteristics stability and reliability were investigated on newly developed high speed GaAs logic ICS. A resistor-loaded source-coupled FET logic (SCFL) was employed as a basic circuit architecture. The selectively epitaxial grown n/sup +/ - GaAs layers were aclopted for the contact regions of the WSi self-aligned gate FET. Maximum operating data rate of more than 2.6 Gb/s was achieved in these devices, guaranteeing sufficient supply voltage and phase margin. No failure has been observed in DC bias test for 3,000 hours and in RF operational test at 2 Gb/s for 7,000 hours.