Modeling the Impact of Process Variation on Critical Charge Distribution

2006 IEEE International SOC Conference Pub Date : 2006-09-01 DOI:10.1109/SOCC.2006.283890

Q. Ding, Rong Luo, Hui Wang, Huazhong Yang, Yuan Xie

引用次数: 28

Abstract

In this paper, we investigate the impact of process variation on soft error vulnerability with Monte Carlo analysis. Our simulation results show that Qcritical variation (3sigma/mean) of four types of storage circuits caused by process variation can be as large as 13.6%. We also propose an empirical model to estimate the Qcritical variation caused by gate length and threshold voltage variations. Simulation results show that this simple model is very accurate. Based on this model, the dependence of Qcritical variation on gate length variation, threshold voltage variation, and correlation between gate lengths is studied, using 70 nm SRAM as benchmark circuit.

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模拟工艺变化对临界电荷分布的影响

本文采用蒙特卡罗分析方法研究了过程变化对软错误脆弱性的影响。我们的仿真结果表明，4种类型的存储电路由于工艺变化引起的Qcritical变异(3sigma/mean)可高达13.6%。我们还提出了一个经验模型来估计由栅极长度和阈值电压变化引起的Qcritical变化。仿真结果表明，该简单模型具有较高的精度。在此模型的基础上，以70 nm SRAM为基准电路，研究了Qcritical变化对栅极长度变化、阈值电压变化和栅极长度相关性的依赖关系。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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2006 IEEE International SOC Conference

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