Reduced area overhead thermal gradient correction for a MOS IC

Abstract

Localized heating of different areas in integrated circuits induces thermal gradient currents to flow across the semiconductor chip, which results in non-ideal performance characteristics. This paper introduces thermal gradient corrections in a novel, hardware implementable way in terms of overhead requirement and power consumption over the existing models which involves use of CCVS and VCVS for corrections to the MOS device as well as the integrated circuit to annul any distortion due to thermal gradient issues. Thus, this work has advantages of large-scale integration due to highly reduced lower area overhead. The corrections are based on quantitative analysis of the thermal gradients flowing in an integrated circuit.