Scalable mean voter for fault-tolerant mixed-signal circuits

S. Askari, B. Dwivedi, A. Saeed, M. Nourani
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引用次数: 4

Abstract

Redundancy techniques, such as N-tuple modular redundancy has been widely used to improve the reliability of digital circuits. Unfortunately nothing substantial has been done for the analog and mixed signal systems. In this paper, we propose a redundancy based fault-tolerant methodology to design a highly reliable analog and digital circuits and systems. The key contribution of our work is an innovative mean voter. This mean voter is a low power, small area, very high bandwidth and linearly scalable voting circuit. Unlike other conventional voters which works with odd N in an NMR, the mean voter works for both odd and even N for analog units and hence reduces the area and power further. For the proof of concept, we designed two fault tolerant analog circuits i.e. a low pass anti-aliasing analog filter and a 4-bit flash ADC. We also presented fault-tolerance mechanism in 4-bit binary adder and an FPGA cell for demonstrating its advantage in digital applications. Experimental results are reported to verify the concepts and measure the system's reliability when single upset transient may occur.
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容错混合信号电路的可扩展平均投票人
n元组模块冗余等冗余技术已被广泛用于提高数字电路的可靠性。不幸的是,模拟和混合信号系统没有实质性的进展。在本文中,我们提出了一种基于冗余的容错方法来设计高可靠的模拟和数字电路和系统。我们工作的关键贡献是一个创新的平均选民。这意味着选民是一个低功耗,小面积,非常高的带宽和线性可扩展的投票电路。与其他传统的核磁共振中使用奇数N的投票人不同,平均投票人对模拟单元的奇数和偶数N都有效,因此进一步减少了面积和功率。为了概念验证,我们设计了两个容错模拟电路,即低通抗混叠模拟滤波器和4位闪存ADC。我们还介绍了4位二进制加法器的容错机制和FPGA单元,以展示其在数字应用中的优势。实验结果验证了该概念,并测量了系统在可能发生单次扰动瞬变时的可靠性。
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