{"title":"The future of semiconductors; Moore or less","authors":"H. Veendrick","doi":"10.1109/TUTCAS.2001.946983","DOIUrl":null,"url":null,"abstract":"Scaling results in: increasing design productivity gap; increasing mask costs; increasing leakage currents; increasing noise while noise margins reduce; increasing test costs; increasing technology costs due to approaching the limits. Design measures to limit leakage and noise and to support testing and debug, require an increasing number of transistors (up to 20-40%) and more complex processes to support embedded options. The move to the next technology will become less and less commercially attractive.","PeriodicalId":376181,"journal":{"name":"Tutorial Guide. ISCAS 2001. IEEE International Symposium on Circuits and Systems (Cat. No.01TH8573)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2001-05-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Tutorial Guide. ISCAS 2001. IEEE International Symposium on Circuits and Systems (Cat. No.01TH8573)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/TUTCAS.2001.946983","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
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Abstract

Scaling results in: increasing design productivity gap; increasing mask costs; increasing leakage currents; increasing noise while noise margins reduce; increasing test costs; increasing technology costs due to approaching the limits. Design measures to limit leakage and noise and to support testing and debug, require an increasing number of transistors (up to 20-40%) and more complex processes to support embedded options. The move to the next technology will become less and less commercially attractive.
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半导体的未来;摩尔或更少
规模化导致:设计生产力差距增大;增加口罩成本;泄漏电流增大;噪声增大,噪声边界减小;增加测试成本;由于接近极限而增加技术成本。限制泄漏和噪声以及支持测试和调试的设计措施需要越来越多的晶体管(高达20-40%)和更复杂的工艺来支持嵌入式选项。转向新技术的商业吸引力将越来越小。
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