{"title":"Implementation of a multi-channel G.723.1 Annex A using a DSP","authors":"Yong-Soo Choi, Chang-Kyu Ahn, Tae-Ik Kang","doi":"10.1109/ICCE.2002.1014047","DOIUrl":null,"url":null,"abstract":"This paper describes a multi-channel G.723.1 Annex A (G.723.1A) implementation focused on code optimization using a general purpose digital signal processor (DSP), TMS320C62x (C62x). To implement a multi-channel G.723.1A, complexity of the ITU-T C-code was analyzed. Then we sorted and optimized C functions in complexity order. In parallel with optimization, we verified the bit-exactness of the optimized code using the ITU-T test vectors. Using only internal memory, the optimized code can perform full-duplex 16 channel processing. In addition, we further increased the number of available channels per DSP using fast algorithms, referred to as bit-compatible optimization.","PeriodicalId":168349,"journal":{"name":"2002 Digest of Technical Papers. International Conference on Consumer Electronics (IEEE Cat. No.02CH37300)","volume":"12 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2002-06-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2002 Digest of Technical Papers. International Conference on Consumer Electronics (IEEE Cat. No.02CH37300)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCE.2002.1014047","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
This paper describes a multi-channel G.723.1 Annex A (G.723.1A) implementation focused on code optimization using a general purpose digital signal processor (DSP), TMS320C62x (C62x). To implement a multi-channel G.723.1A, complexity of the ITU-T C-code was analyzed. Then we sorted and optimized C functions in complexity order. In parallel with optimization, we verified the bit-exactness of the optimized code using the ITU-T test vectors. Using only internal memory, the optimized code can perform full-duplex 16 channel processing. In addition, we further increased the number of available channels per DSP using fast algorithms, referred to as bit-compatible optimization.
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