A High Gain, Low Power Operational Amplifier utilizing BiCMOS Class AB Output Stage

Abstract

The schematic of class-AB yield stage with BJT, CMOS, BiCMOS is carried out in cadence virtuoso simulator. Every transistor size in the operational amp is designed, validated and BiCMOS operated at supply voltage of 3.3V. The proposed amplifier circuit utilizes a class-AB output stage comprising of PMOS and NMOS transistors along with NPN an PNP push pull circuit is made use. The BiCMOS circuit is made use to achieve advantage of CMOS as well as bipolar. Then, at that point Cascode amplifier stage-based op amp using CMOS Class-AB output and Cascode amplifier stage-based op amp using BiCMOS Class-AB output are compared.