Generative Target Tracking Method with Improved Generative Adversarial Network

IF 1 4区 工程技术 Q4 ENGINEERING, ELECTRICAL & ELECTRONIC Iet Circuits Devices & Systems Pub Date : 2023-10-23 DOI:10.1049/2023/6620581
Yongping Yang, Hongshun Chen
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Abstract

Multitarget tracking is prone to target loss, identity exchange, and jumping problems in the context of complex background, target occlusion, target scale, and pose transformation. In this paper, we proposed a target tracking algorithm based on the conditional adversarial generative twin networks, using the improved you only look once multitarget association algorithm to classify and detect the position of the target to be detected in the current frame, constructing a feature extraction model using generative adversarial networks (GANs) to learn the main features and subtle features of the target, and then using GANs to generate the motion trajectories of multiple targets, finally fuzing the motion and appearance information of the target to obtain the optimal match. The optimal matching of the tracked targets is obtained. The experimental results under OTB2015 and IVOT2018 datasets demonstrate that the proposed multitarget tracking algorithm has high accuracy and robustness, with 65% less jumps and 0.25% more accuracy than the current algorithms with minimal identity exchange and jumps.
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基于改进生成对抗网络的生成目标跟踪方法
在复杂背景、目标遮挡、目标尺度、姿态变换等环境下,多目标跟踪容易出现目标丢失、身份交换、跳跃等问题。在本文中,我们提出了一种基于条件对抗生成孪生网络的目标跟踪算法,使用改进的“只看一次”多目标关联算法对当前帧中待检测目标的位置进行分类和检测,使用生成对抗网络(GANs)构建特征提取模型来学习目标的主要特征和细微特征;然后利用gan生成多个目标的运动轨迹,最后融合目标的运动和外观信息,得到最优匹配。得到了跟踪目标的最优匹配。在OTB2015和IVOT2018数据集上的实验结果表明,所提出的多目标跟踪算法具有较高的精度和鲁棒性,在最小身份交换和最小跳变的情况下,比现有算法减少65%的跳变,提高0.25%的精度。
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来源期刊
Iet Circuits Devices & Systems
Iet Circuits Devices & Systems 工程技术-工程:电子与电气
CiteScore
3.80
自引率
7.70%
发文量
32
审稿时长
3 months
期刊介绍: IET Circuits, Devices & Systems covers the following topics: Circuit theory and design, circuit analysis and simulation, computer aided design Filters (analogue and switched capacitor) Circuit implementations, cells and architectures for integration including VLSI Testability, fault tolerant design, minimisation of circuits and CAD for VLSI Novel or improved electronic devices for both traditional and emerging technologies including nanoelectronics and MEMs Device and process characterisation, device parameter extraction schemes Mathematics of circuits and systems theory Test and measurement techniques involving electronic circuits, circuits for industrial applications, sensors and transducers
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