N. A. Quadir, Amit Jain, S. Kashfi, Lutfi Albasha, Nasser Qaddoumi
{"title":"The Design and Process Reliability Analysis of Millimeter Wave CMOS Power Amplifier with a Cold Mode MOSFET Linearization","authors":"N. A. Quadir, Amit Jain, S. Kashfi, Lutfi Albasha, Nasser Qaddoumi","doi":"10.1049/2023/2265697","DOIUrl":null,"url":null,"abstract":"A power amplifier design operating at 28 GHz for communication applications is presented in this paper. Analog predistorted technique is used to improve the linearity using a cold mode MOSFET linearizer. The paper reports +19.8 dBm of peak power at the output and power-added efficiency (PAE) of 17% is attained by the designed circuit. The 1-dB compression point linearity was +18.6 dBm. The adjacent channel power ratio (ACPR) simulations were performed for the different communication standards like 802_11n_40M, CDMA, IS-95, and 802_11n_20M. Design specification variations of the amplifier have been analyzed over five process corners and simulations were performed to validate compliance with standards and robustness of the designed circuit. Monte Carlo simulation were performed to assess the performance over statistical variability of PAE and power gain. It is believed that this linearization design and the verifications used are done for the first time on a 65-nm RFCMOS process.","PeriodicalId":50386,"journal":{"name":"Iet Circuits Devices & Systems","volume":null,"pages":null},"PeriodicalIF":1.0000,"publicationDate":"2023-10-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Iet Circuits Devices & Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1049/2023/2265697","RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q4","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0
Abstract
A power amplifier design operating at 28 GHz for communication applications is presented in this paper. Analog predistorted technique is used to improve the linearity using a cold mode MOSFET linearizer. The paper reports +19.8 dBm of peak power at the output and power-added efficiency (PAE) of 17% is attained by the designed circuit. The 1-dB compression point linearity was +18.6 dBm. The adjacent channel power ratio (ACPR) simulations were performed for the different communication standards like 802_11n_40M, CDMA, IS-95, and 802_11n_20M. Design specification variations of the amplifier have been analyzed over five process corners and simulations were performed to validate compliance with standards and robustness of the designed circuit. Monte Carlo simulation were performed to assess the performance over statistical variability of PAE and power gain. It is believed that this linearization design and the verifications used are done for the first time on a 65-nm RFCMOS process.
期刊介绍：
IET Circuits, Devices & Systems covers the following topics:
Circuit theory and design, circuit analysis and simulation, computer aided design
Filters (analogue and switched capacitor)
Circuit implementations, cells and architectures for integration including VLSI
Testability, fault tolerant design, minimisation of circuits and CAD for VLSI
Novel or improved electronic devices for both traditional and emerging technologies including nanoelectronics and MEMs
Device and process characterisation, device parameter extraction schemes
Mathematics of circuits and systems theory
Test and measurement techniques involving electronic circuits, circuits for industrial applications, sensors and transducers
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