Moufu Kong;Zeyu Cheng;Zewei Hu;Ning Yu;Bo Yi;Hongqiang Yang
{"title":"A New SiC Quasi MOSFET for Ultra-Low Specific On-Resistance and Improved Reliability","authors":"Moufu Kong;Zeyu Cheng;Zewei Hu;Ning Yu;Bo Yi;Hongqiang Yang","doi":"10.1109/TDMR.2023.3323977","DOIUrl":null,"url":null,"abstract":"In this paper, a new ultra-low specific on-resistance quasi SiC MOSFET is proposed. Compared with the conventional SiC MOSFET, the proposed quasi SiC MOSFET has no problems caused by low channel mobility and gate oxide reliability. And compared with the conventional SiC JFET, the proposed quasi SiC MOSFET is a normally-off device without the controllability issue of the normally-on device. Through simulation, it is found that the specific on-resistance \n<inline-formula> <tex-math>$(R_{\\mathrm{ on,sp}})$ </tex-math></inline-formula>\n of the proposed quasi SiC MOSFET is 2.46m\n<inline-formula> <tex-math>$\\Omega \\cdot $ </tex-math></inline-formula>\ncm 2, while the \n<inline-formula> <tex-math>$R_{\\mathrm{ on,sp}}$ </tex-math></inline-formula>\n of the conventional SiC MOSFET is 3.29 \n<inline-formula> <tex-math>$\\text{m}\\Omega \\cdot $ </tex-math></inline-formula>\ncm 2, with a reduction of more than 25% at almost the same breakdown voltage. In the forward conduction state, the saturation current of the proposed quasi SiC MOSFET is smaller than that of the conventional SiC MOSFET at \n<inline-formula> <tex-math>$V_{\\mathrm{ GS}}\\,\\,=$ </tex-math></inline-formula>\n 15V and 20V, which shows that the proposed quasi SiC MOSFET has a better safe operating area (SOA) and better short-circuit capability. Compared with the conventional SiC MOSFET, the Figure-of-Merit (FOM) of the proposed device is improved by 38%. In addition, since the proposed structure is sustaining voltage by the high voltage JFET cell without a gate oxide layer, it is suggested that the proposed device does not have gate oxide reliability problems.","PeriodicalId":448,"journal":{"name":"IEEE Transactions on Device and Materials Reliability","volume":"23 4","pages":"577-583"},"PeriodicalIF":2.5000,"publicationDate":"2023-10-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Transactions on Device and Materials Reliability","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/10283943/","RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0
Abstract
In this paper, a new ultra-low specific on-resistance quasi SiC MOSFET is proposed. Compared with the conventional SiC MOSFET, the proposed quasi SiC MOSFET has no problems caused by low channel mobility and gate oxide reliability. And compared with the conventional SiC JFET, the proposed quasi SiC MOSFET is a normally-off device without the controllability issue of the normally-on device. Through simulation, it is found that the specific on-resistance
$(R_{\mathrm{ on,sp}})$
of the proposed quasi SiC MOSFET is 2.46m
$\Omega \cdot $
cm 2, while the
$R_{\mathrm{ on,sp}}$
of the conventional SiC MOSFET is 3.29
$\text{m}\Omega \cdot $
cm 2, with a reduction of more than 25% at almost the same breakdown voltage. In the forward conduction state, the saturation current of the proposed quasi SiC MOSFET is smaller than that of the conventional SiC MOSFET at
$V_{\mathrm{ GS}}\,\,=$
15V and 20V, which shows that the proposed quasi SiC MOSFET has a better safe operating area (SOA) and better short-circuit capability. Compared with the conventional SiC MOSFET, the Figure-of-Merit (FOM) of the proposed device is improved by 38%. In addition, since the proposed structure is sustaining voltage by the high voltage JFET cell without a gate oxide layer, it is suggested that the proposed device does not have gate oxide reliability problems.
期刊介绍:
The scope of the publication includes, but is not limited to Reliability of: Devices, Materials, Processes, Interfaces, Integrated Microsystems (including MEMS & Sensors), Transistors, Technology (CMOS, BiCMOS, etc.), Integrated Circuits (IC, SSI, MSI, LSI, ULSI, ELSI, etc.), Thin Film Transistor Applications. The measurement and understanding of the reliability of such entities at each phase, from the concept stage through research and development and into manufacturing scale-up, provides the overall database on the reliability of the devices, materials, processes, package and other necessities for the successful introduction of a product to market. This reliability database is the foundation for a quality product, which meets customer expectation. A product so developed has high reliability. High quality will be achieved because product weaknesses will have been found (root cause analysis) and designed out of the final product. This process of ever increasing reliability and quality will result in a superior product. In the end, reliability and quality are not one thing; but in a sense everything, which can be or has to be done to guarantee that the product successfully performs in the field under customer conditions. Our goal is to capture these advances. An additional objective is to focus cross fertilized communication in the state of the art of reliability of electronic materials and devices and provide fundamental understanding of basic phenomena that affect reliability. In addition, the publication is a forum for interdisciplinary studies on reliability. An overall goal is to provide leading edge/state of the art information, which is critically relevant to the creation of reliable products.