Pub Date : 2025-01-14DOI: 10.1109/TDMR.2025.3528093
{"title":"2024 Index IEEE Transactions on Device and Materials Reliability Vol. 24","authors":"","doi":"10.1109/TDMR.2025.3528093","DOIUrl":"https://doi.org/10.1109/TDMR.2025.3528093","url":null,"abstract":"","PeriodicalId":448,"journal":{"name":"IEEE Transactions on Device and Materials Reliability","volume":"24 4","pages":"665-682"},"PeriodicalIF":2.5,"publicationDate":"2025-01-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10841807","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142975942","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-12-23DOI: 10.1109/TDMR.2024.3520737
{"title":"TechRxiv: Share Your Preprint Research with the World!","authors":"","doi":"10.1109/TDMR.2024.3520737","DOIUrl":"https://doi.org/10.1109/TDMR.2024.3520737","url":null,"abstract":"","PeriodicalId":448,"journal":{"name":"IEEE Transactions on Device and Materials Reliability","volume":"24 4","pages":"664-664"},"PeriodicalIF":2.5,"publicationDate":"2024-12-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10812357","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142875094","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-12-23DOI: 10.1109/TDMR.2024.3516717
{"title":"IEEE Transactions on Device and Materials Reliability Publication Information","authors":"","doi":"10.1109/TDMR.2024.3516717","DOIUrl":"https://doi.org/10.1109/TDMR.2024.3516717","url":null,"abstract":"","PeriodicalId":448,"journal":{"name":"IEEE Transactions on Device and Materials Reliability","volume":"24 4","pages":"C2-C2"},"PeriodicalIF":2.5,"publicationDate":"2024-12-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10812356","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142875098","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-12-23DOI: 10.1109/TDMR.2024.3508312
Edmundo Gutierrez
{"title":"TDMR December 2024 Editorial","authors":"Edmundo Gutierrez","doi":"10.1109/TDMR.2024.3508312","DOIUrl":"https://doi.org/10.1109/TDMR.2024.3508312","url":null,"abstract":"","PeriodicalId":448,"journal":{"name":"IEEE Transactions on Device and Materials Reliability","volume":"24 4","pages":"470-470"},"PeriodicalIF":2.5,"publicationDate":"2024-12-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10812355","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142875095","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-12-23DOI: 10.1109/TDMR.2024.3516718
{"title":"IEEE Transactions on Device and Materials Reliability Information for Authors","authors":"","doi":"10.1109/TDMR.2024.3516718","DOIUrl":"https://doi.org/10.1109/TDMR.2024.3516718","url":null,"abstract":"","PeriodicalId":448,"journal":{"name":"IEEE Transactions on Device and Materials Reliability","volume":"24 4","pages":"C3-C3"},"PeriodicalIF":2.5,"publicationDate":"2024-12-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10812196","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142875093","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-12-23DOI: 10.1109/TDMR.2024.3516719
{"title":"Blank Page","authors":"","doi":"10.1109/TDMR.2024.3516719","DOIUrl":"https://doi.org/10.1109/TDMR.2024.3516719","url":null,"abstract":"","PeriodicalId":448,"journal":{"name":"IEEE Transactions on Device and Materials Reliability","volume":"24 4","pages":"C4-C4"},"PeriodicalIF":2.5,"publicationDate":"2024-12-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10812197","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142875072","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-12-23DOI: 10.1109/TDMR.2024.3507412
Ming-Dou Ker
{"title":"Editorial on EOS","authors":"Ming-Dou Ker","doi":"10.1109/TDMR.2024.3507412","DOIUrl":"https://doi.org/10.1109/TDMR.2024.3507412","url":null,"abstract":"","PeriodicalId":448,"journal":{"name":"IEEE Transactions on Device and Materials Reliability","volume":"24 4","pages":"471-471"},"PeriodicalIF":2.5,"publicationDate":"2024-12-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10812359","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142875099","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-12-23DOI: 10.1109/TDMR.2024.3513737
{"title":"Call for Nominations for Editor-in-Chief","authors":"","doi":"10.1109/TDMR.2024.3513737","DOIUrl":"https://doi.org/10.1109/TDMR.2024.3513737","url":null,"abstract":"","PeriodicalId":448,"journal":{"name":"IEEE Transactions on Device and Materials Reliability","volume":"24 4","pages":"663-663"},"PeriodicalIF":2.5,"publicationDate":"2024-12-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10812200","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142875145","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
This work presents enhanced hysteresis width for noise-immune radiation-hardened Schmitt trigger circuits. A dual-mode Domino-based Schmitt trigger (DST) circuit is employed for dual purposes owing to the inclusion of a control module that functions as both a domino logic and a Schmitt trigger circuit. For various ST circuits, key performance metrics including hysteresis width, power consumption, latency, process variation, and critical charge at sensitive nodes are determined. The findings demonstrate that, in comparison to other reference circuits, the DST has improved performance metrics. The proposed DST has $3.89times $ , $1.58times $ , and $1.03times $ lower dynamic power, leakage power, and propagation delay, respectively in comparison to conventional ST. The hysteresis width of DST is $1.32times $ higher than conventional ST which makes it more practical for a noisy environment. All the simulation work has been handled by the Cadence virtuoso tool using UMC 40nm technology.
{"title":"Radiation Hardened Domino Logic-Based Schmitt Trigger Circuit With Improved Noise Immunity","authors":"Aryan Kannaujiya;Shubham Singh;Ambika Prasad Shah;Daniele Rossi","doi":"10.1109/TDMR.2024.3496821","DOIUrl":"https://doi.org/10.1109/TDMR.2024.3496821","url":null,"abstract":"This work presents enhanced hysteresis width for noise-immune radiation-hardened Schmitt trigger circuits. A dual-mode Domino-based Schmitt trigger (DST) circuit is employed for dual purposes owing to the inclusion of a control module that functions as both a domino logic and a Schmitt trigger circuit. For various ST circuits, key performance metrics including hysteresis width, power consumption, latency, process variation, and critical charge at sensitive nodes are determined. The findings demonstrate that, in comparison to other reference circuits, the DST has improved performance metrics. The proposed DST has \u0000<inline-formula> <tex-math>$3.89times $ </tex-math></inline-formula>\u0000, \u0000<inline-formula> <tex-math>$1.58times $ </tex-math></inline-formula>\u0000, and \u0000<inline-formula> <tex-math>$1.03times $ </tex-math></inline-formula>\u0000 lower dynamic power, leakage power, and propagation delay, respectively in comparison to conventional ST. The hysteresis width of DST is \u0000<inline-formula> <tex-math>$1.32times $ </tex-math></inline-formula>\u0000 higher than conventional ST which makes it more practical for a noisy environment. All the simulation work has been handled by the Cadence virtuoso tool using UMC 40nm technology.","PeriodicalId":448,"journal":{"name":"IEEE Transactions on Device and Materials Reliability","volume":"24 4","pages":"602-609"},"PeriodicalIF":2.5,"publicationDate":"2024-11-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142875148","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
In this paper, the carrier trapping behavior and electrical characteristics of AlGaN/GaN high electron mobility transistors (HEMTs) under different bias conditions are studied based on the transient current. By considering the transient drain current of HEMTs at different temperatures, three trapping mechanisms are identified: (1) charge trapping in the AlGaN barrier layer, in the gate-drain region near the two-dimensional electron gas (2DEG) channel; (2) charge trapping in the GaN layer, in the gate-drain region near the gate; and (3) charge trapping on the surface of the AlGaN layer, in the gate-drain region near the gate. The influences of the source-gate and drain-gate voltages on trapping behavior are analyzed to further elucidate the trap locations. The experimental results show that charge capture is mainly affected by the drain-gate voltage. High electric field stress affects the local structure order inside the device, thus affecting the charge escape rate. The threshold voltage shift is mainly affected by the surface trap of the AlGaN layer near the gate.
{"title":"Trap Location and Stress Degradation Analysis of GaN High Electron Mobility Transistors Based on the Transient Current Method","authors":"Qian Wen;Lixing Zhou;Xianwei Meng;Shiwei Feng;Yamin Zhang","doi":"10.1109/TDMR.2024.3495987","DOIUrl":"https://doi.org/10.1109/TDMR.2024.3495987","url":null,"abstract":"In this paper, the carrier trapping behavior and electrical characteristics of AlGaN/GaN high electron mobility transistors (HEMTs) under different bias conditions are studied based on the transient current. By considering the transient drain current of HEMTs at different temperatures, three trapping mechanisms are identified: (1) charge trapping in the AlGaN barrier layer, in the gate-drain region near the two-dimensional electron gas (2DEG) channel; (2) charge trapping in the GaN layer, in the gate-drain region near the gate; and (3) charge trapping on the surface of the AlGaN layer, in the gate-drain region near the gate. The influences of the source-gate and drain-gate voltages on trapping behavior are analyzed to further elucidate the trap locations. The experimental results show that charge capture is mainly affected by the drain-gate voltage. High electric field stress affects the local structure order inside the device, thus affecting the charge escape rate. The threshold voltage shift is mainly affected by the surface trap of the AlGaN layer near the gate.","PeriodicalId":448,"journal":{"name":"IEEE Transactions on Device and Materials Reliability","volume":"24 4","pages":"624-630"},"PeriodicalIF":2.5,"publicationDate":"2024-11-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142875146","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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