High Speed Binary Neural Network Hardware Accelerator Relied on Optical NEMS

IF 2.1 4区 工程技术 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC IEEE Transactions on Nanotechnology Pub Date : 2023-12-15 DOI:10.1109/TNANO.2023.3343618
Yashar Gholami;Fahimeh Marvi;Romina Ghorbanloo;Mohammad Reza Eslami;Kian Jafari
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Abstract

In this article, an electrostatically-actuated NEMS XOR gate is proposed based on photonic crystals for hardware implementation of binary neural networks. The device includes a 2D photonic crystal which is set on a movable electrode to implement the XOR logic using the transmission of specific wavelengths to the output. This design represents the importance of the proposed structure in which the logic gate operation is not dependent on the contact of its conductive layers. Consequently, one of the major issues in MEMS-based logic gates, which is due to the contact of the operating electrodes and may cause stiction problem, reducing the reliability of the system, can be tackled by the present approach. Furthermore, according to the simulation results, the functional characteristics of the present NEMS XOR gate are obtained as follows: pull-in voltage of V p = 8V, operating voltage of V o = 10V and switching time of t s = 4 μs. The results also show that the proposed design provides a classification error rate of between 1% to 12%, while used in neural network implementation. This error can be negligible compared to the state-of-the-art designs in neural network implementation. These appropriate parameters of the present NEMS gate make it a promising choice for the implementation of neural networks with a high network accuracy even in the presence of significant process variations.
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依靠光学 NEMS 的高速二进制神经网络硬件加速器
本文提出了一种基于光子晶体的静电驱动 NEMS XOR 门,用于二进制神经网络的硬件实现。该装置包括一个二维光子晶体,它被设置在一个可移动的电极上,利用特定波长向输出端的传输来实现 XOR 逻辑。这种设计体现了拟议结构的重要性,其中逻辑门的运行不依赖于导电层的接触。因此,本方法可以解决基于 MEMS 的逻辑门的一个主要问题,即由于工作电极的接触而可能导致的滞留问题,从而降低系统的可靠性。此外,根据仿真结果,本 NEMS XOR 门的功能特性如下:拉入电压 Vp = 8V,工作电压 Vo = 10V,开关时间 ts = 4 μs。结果还显示,在用于神经网络实现时,所提出的设计可提供 1% 到 12% 的分类误差率。与最先进的神经网络实现设计相比,这一误差可以忽略不计。本 NEMS 栅极的这些适当参数使其成为实施神经网络的理想选择,即使在存在显著工艺变化的情况下,也能实现较高的网络精度。
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来源期刊
IEEE Transactions on Nanotechnology
IEEE Transactions on Nanotechnology 工程技术-材料科学:综合
CiteScore
4.80
自引率
8.30%
发文量
74
审稿时长
8.3 months
期刊介绍: The IEEE Transactions on Nanotechnology is devoted to the publication of manuscripts of archival value in the general area of nanotechnology, which is rapidly emerging as one of the fastest growing and most promising new technological developments for the next generation and beyond.
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