{"title":"NeuroBus - Architecture for an Ultra-Flexible Neural Interface","authors":"Markus Sporer;Ioana-Georgiana Vasilaş;Ahmed Adžemović;Nicolas Graber;Stefan Reich;Calogero Gueli;Max Eickenscheidt;Ilka Diester;Thomas Stieglitz;Maurits Ortmanns","doi":"10.1109/TBCAS.2024.3354785","DOIUrl":null,"url":null,"abstract":"This article presents the system architecture for an implant concept called \n<italic>NeuroBus</i>\n. Tiny distributed direct digitizing neural recorder ASICs on an ultra-flexible polyimide substrate are connected in a bus-like structure, allowing short connections between electrode and recording front-end with low wiring effort and high customizability. The small size (344\n<inline-formula><tex-math>$\\,\\mu$</tex-math></inline-formula>\nm × 294 \n<inline-formula><tex-math>$\\mu$</tex-math></inline-formula>\nm) of the ASICs and the ultraflexible substrate allow a low bending stiffness, enabling the implant to adapt to the curvature of the brain and achieving high structural biocompatibility. We introduce the architecture, the integrated building blocks, and the post-CMOS processes required to realize a \n<italic>NeuroBus</i>\n, and we characterize the prototyped direct digitizing neural recorder front-end as well as polyimide-based ECoG brain interface. A rodent animal model is further used to validate the joint capability of the recording front-end and thin-film electrode array.","PeriodicalId":94031,"journal":{"name":"IEEE transactions on biomedical circuits and systems","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2024-01-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10400847","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE transactions on biomedical circuits and systems","FirstCategoryId":"1085","ListUrlMain":"https://ieeexplore.ieee.org/document/10400847/","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
This article presents the system architecture for an implant concept called
NeuroBus
. Tiny distributed direct digitizing neural recorder ASICs on an ultra-flexible polyimide substrate are connected in a bus-like structure, allowing short connections between electrode and recording front-end with low wiring effort and high customizability. The small size (344
$\,\mu$
m × 294
$\mu$
m) of the ASICs and the ultraflexible substrate allow a low bending stiffness, enabling the implant to adapt to the curvature of the brain and achieving high structural biocompatibility. We introduce the architecture, the integrated building blocks, and the post-CMOS processes required to realize a
NeuroBus
, and we characterize the prototyped direct digitizing neural recorder front-end as well as polyimide-based ECoG brain interface. A rodent animal model is further used to validate the joint capability of the recording front-end and thin-film electrode array.