{"title":"An improved 1.8 V 4.05 ppm/°C curvature corrected bandgap reference circuit","authors":"Anushree, Jasdeep Kaur","doi":"10.1007/s10470-023-02234-z","DOIUrl":null,"url":null,"abstract":"<div><p>In this paper a curvature corrected bandgap reference circuit is presented which uses folded cascode operation amplifier using beta multiplier as a constant current source. It consists of PTAT current generation circuit and CTAT current generation circuit as two major subparts. The proposed design produces reference voltage of 701.78 mV with temperature coefficient of 4.05 ppm/°C for the temperature range of – 40 to 125 °C.The value of power consumed by the circuit is 86.135 µW at 1.8 V supply voltage. For proposed design the value of power supply rejection ratio is − 60.53 dB for frequency range of 100 Hz to 100 kHz. All simulation results are obtained in cadence virtuoso using SCL 180 nm CMOS technology.</p></div>","PeriodicalId":7827,"journal":{"name":"Analog Integrated Circuits and Signal Processing","volume":"118 2","pages":"239 - 246"},"PeriodicalIF":1.2000,"publicationDate":"2024-01-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Analog Integrated Circuits and Signal Processing","FirstCategoryId":"5","ListUrlMain":"https://link.springer.com/article/10.1007/s10470-023-02234-z","RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q4","JCRName":"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE","Score":null,"Total":0}
引用次数: 0
Abstract
In this paper a curvature corrected bandgap reference circuit is presented which uses folded cascode operation amplifier using beta multiplier as a constant current source. It consists of PTAT current generation circuit and CTAT current generation circuit as two major subparts. The proposed design produces reference voltage of 701.78 mV with temperature coefficient of 4.05 ppm/°C for the temperature range of – 40 to 125 °C.The value of power consumed by the circuit is 86.135 µW at 1.8 V supply voltage. For proposed design the value of power supply rejection ratio is − 60.53 dB for frequency range of 100 Hz to 100 kHz. All simulation results are obtained in cadence virtuoso using SCL 180 nm CMOS technology.
期刊介绍:
Analog Integrated Circuits and Signal Processing is an archival peer reviewed journal dedicated to the design and application of analog, radio frequency (RF), and mixed signal integrated circuits (ICs) as well as signal processing circuits and systems. It features both new research results and tutorial views and reflects the large volume of cutting-edge research activity in the worldwide field today.
A partial list of topics includes analog and mixed signal interface circuits and systems; analog and RFIC design; data converters; active-RC, switched-capacitor, and continuous-time integrated filters; mixed analog/digital VLSI systems; wireless radio transceivers; clock and data recovery circuits; and high speed optoelectronic circuits and systems.