High Power Density On-Board Charger Featuring Power Pulsating Buffer

Abstract

Power electronics plays a key role in electric vehicle technology in areas such as the battery charging and managing, dc distribution and motor drive systems, among others. There are, however, significant challenges to be addressed in terms of cost, performance, reliability and power density. This paper aims at proposing an improved on-board charger architecture taking advantage of a power pulsating buffer topology. The proposed architecture will enable to significantly reduce the dc-link capacitor size, enabling a change in its technology, and leading to a higher power density and higher reliability implementation. The proposed architecture is analyzed, its main design considerations are discussed and, finally, a 3.6-kW experimental prototype is designed and implemented to prove the feasibility of this proposal. As a conclusion, the proposed topology is recommended as a high-performance high-power-density OBC implementation for future EVs.