Faribrz Parandin, S. Olyaee, F. Heidari, M. Soroosh, Ali Farmani, H. Saghaei, Rouhollah Karimzadeh, M. Maleki, Asghar Askarian, Zahra Rahimi, Arefe Ehyaee
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引用次数: 0
Abstract
A half-subtractor is a digital circuit that subtracts two inputs and displays the result in two outputs. Photonic crystals (PhCs) are used in optical circuits, including encoders, multiplexers, adders, subtractors, timers, counters, etc. This paper reviews and compares some of the all-optical half-subtractors and full-subtractors based on PhCs reported to date. We study physical parameters, including the arrangement of dielectric rods, rod radius, lattice constant, structure area, background material, and resonator type and illustrate the structure with a small size is suitable for integration in a photonic chip. Another crucial factor is the optical power difference between the two logic states of 0 and 1. A large difference between these two values increases the contrast ratio and reduces the detection error in the output. Delay time as a key parameter specifies that the input signal will leave the desired output after a few femtoseconds. Linear structures have the lowest delay time, fall time, and rise time among compared structures. But on the other hand, non-linear structures have the highest amount of contrast ratio. In the recent papers, relatively favorable delay times are obtained, equal to 0.06, 0.1, and 0.85 ps, respectively. Also, the fall times are a small value and are equal to 0.05, 0.1, and 0.25 ps, respectively, and the rise times are equal to 0.1, 0.5, and 0.7 ps, respectively. Also, the contrast ratio values are high and acceptable which are equal to 25.88, 18.80, and 18.40, respectively.