{"title":"A 6.4-Gbps 0.41-pJ/b fully-digital die-to-die interconnect PHY for silicon interposer based 2.5D integration","authors":"Yinglin Yang, Yunzhengmao Wang, Tengyue Yi, Chixiao Chen, Qi Liu","doi":"10.1016/j.vlsi.2024.102170","DOIUrl":null,"url":null,"abstract":"","PeriodicalId":502318,"journal":{"name":"Integration","volume":"39 2","pages":""},"PeriodicalIF":0.0000,"publicationDate":"2024-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Integration","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1016/j.vlsi.2024.102170","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
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