Miniaturized Stepped Impedance Transmission Lines for D-Band Wideband Power Divider With Isolation Capacitor

IF 2.2 Q3 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE IEEE Solid-State Circuits Letters Pub Date : 2024-01-29 DOI:10.1109/LSSC.2024.3359315
Seonjeong Park;Songcheol Hong
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Abstract

In this letter, a broadband Wilkinson power divider (WPD) with small size and low loss using round-shaped stepped impedance transmission lines (RS-SITLs) is proposed in both differential and single-ended structures. Miniaturization was achieved through the SITLs with an electrical length smaller than 90°. The insufficient length for odd-mode matching is addressed by introducing an isolation capacitor. Physical parameters are determined considering feasible characteristic impedances through respective mode analyses. Chips are fabricated using a 40-nm RF CMOS process, resulting in a 25% reduction in area compared to the conventional WPD with a $\boldsymbol{\lambda }$ /4 transmission line, with a core size as small as $0.002~\lambda ^{2}$ . In the 110–170-GHz band, the proposed single-ended and differential SITL WPDs, respectively, have low-insertion losses (ILs) of 0.91 and 0.69 dB and high isolations (ISOs) of 14.7 and 15.3 dB.
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用于带隔离电容器 D 波段宽带功率分配器的小型化阶跃阻抗传输线
在这封信中,我们提出了一种宽带威尔金森功率分配器(WPD),它采用圆型阶梯阻抗传输线(RS-SITL),具有差分和单端结构,体积小、损耗低。通过电气长度小于 90° 的 SITL 实现了小型化。通过引入隔离电容器,解决了奇模匹配长度不足的问题。物理参数是通过各自的模式分析,考虑可行的特性阻抗后确定的。芯片采用 40 纳米射频 CMOS 工艺制造,与采用 $\boldsymbol{\lambda }$ /4 传输线的传统 WPD 相比,面积减少了 25%,内核尺寸小至 0.在 110-170 GHz 频段,所提出的单端和差分 SITL WPD 的插入损耗(IL)分别为 0.91 和 0.69 dB,隔离度(ISO)分别为 14.7 和 15.3 dB。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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来源期刊
IEEE Solid-State Circuits Letters
IEEE Solid-State Circuits Letters Engineering-Electrical and Electronic Engineering
CiteScore
4.30
自引率
3.70%
发文量
52
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