Advancing Hardware Security: A Review and Novel Design of Configurable Arbiter PUF with DCM-Induced Metastability for Enhanced Resource Efficiency and Unpredictability

Q3 Engineering 推进技术 Pub Date : 2024-02-16 DOI:10.52783/tjjpt.v45.i01.4934
Lukram Dhanachandra Singh, Preetisudha Meher
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Abstract

As the Internet of Things (IoT) and Blockchain technologies continue to assert their dominance in the technical landscape, the demand to enhance security measures becomes foremost. In this context, Physical Unclonable Functions (PUFs) are widely used hardware security primitives that can be used to solve a wide range of security issues. To support hardware security solutions, this paper presents an extensive overview and analysis of the existing Physical Unclonable Functions (PUFs) used as True Random Number Generators (TRNGs). Recognizing the shortcomings of current PUF designs, we propose a configurable Arbiter PUF design employing Digital Clock Manager (DCM)-induced metastability as an entropy source, presenting a robust solution for evolving hardware security. To mitigate the adverse consequences of metastability, the proposed Arbiter PUF includes a Carry Chain primitive with four Flip-Flop clones. Acknowledging the constantly evolving IoT and Blockchain environment, the suggested configurable Arbiter PUF is made to satisfy the highest security standards. By exploiting the inherent variations in FPGA technology, we aim to reduce system resource and area consumption, aligning with the efficiency criteria of modern applications. The system's performance is additionally enhanced by an on-chip post-processing based on DSP. Simulation results demonstrate successful implementation on a Xilinx Basys-3 FPGA board, offering a scalable and efficient solution. The generated sequences of the proposed PUF undergo rigorous testing, including National Institute of Standards and Technology (NIST) statistical tests for uniqueness, reliability, and randomness.  This holistic approach aims to improve the PUF's performance and security.  
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推进硬件安全:可配置仲裁器 PUF(具有 DCM 诱导的流变性,可提高资源效率和不可预测性)回顾与创新设计
随着物联网(IoT)和区块链技术继续在技术领域占据主导地位,加强安全措施的需求变得尤为迫切。在此背景下,物理不可克隆函数(PUF)是一种广泛使用的硬件安全基元,可用于解决各种安全问题。为了支持硬件安全解决方案,本文对用作真随机数生成器(TRNG)的现有物理不可克隆函数(PUF)进行了广泛的概述和分析。认识到当前 PUF 设计的不足之处,我们提出了一种可配置仲裁器 PUF 设计,采用数字时钟管理器 (DCM) 引发的陨变作为熵源,为不断发展的硬件安全提供了一种稳健的解决方案。为了减轻可变性带来的不良后果,所提出的仲裁器 PUF 包含一个带有四个触发器克隆的携带链基元。考虑到不断发展的物联网和区块链环境,所建议的可配置仲裁器 PUF 符合最高安全标准。通过利用 FPGA 技术的固有变化,我们旨在减少系统资源和面积消耗,从而与现代应用的效率标准保持一致。此外,基于数字信号处理器的片上后处理功能也提高了系统的性能。仿真结果表明,该系统在 Xilinx Basys-3 FPGA 板上成功实现,提供了一个可扩展的高效解决方案。拟议 PUF 生成的序列经过了严格的测试,包括美国国家标准与技术研究院 (NIST) 的唯一性、可靠性和随机性统计测试。 这种综合方法旨在提高 PUF 的性能和安全性。
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来源期刊
推进技术
推进技术 Engineering-Aerospace Engineering
CiteScore
1.40
自引率
0.00%
发文量
6610
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