Research Toward Wafer-Scale 3D Integration of InP Membrane Photonics With InP Electronics

IF 2.3 3区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC IEEE Transactions on Semiconductor Manufacturing Pub Date : 2024-03-27 DOI:10.1109/TSM.2024.3382511
S. Abdi;V. Nodjiadjim;R. Hersent;M. Riet;C. Mismer;T. de Vries;K. A. Williams;Y. Jiao
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Abstract

In this study, we focus on the development of key processes towards wafer-scale 3-dimentional/vertical (3D) integration of Indium-Phosphide (InP) photonic membranes on InP electronics via adhesive bonding. First, we identified the most critical steps and optimized them to achieve high thermal and mechanical compatibility of components for the co-integration process. Next, we developed a strategy for InP-to-InP wafer bonding with high topology tolerance, and introduced hard benzocyclobutene (BCB) anchors to preserve the alignment and BCB thickness uniformity after bonding. The resulting bond layer is homogeneous in terms of physical and mechanical properties. Finally, we developed a novel method to selectively remove the InP substrate from the photonics side via wet etching while protecting the electronics carrier wafer with hermetic multi-layer coatings. The investigation of these key steps is essential for scalable 3D integration of photonics and electronics at ultra short distances (< $15 ~\mu \text{m}$ ).
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实现 InP 膜光子学与 InP 电子学晶圆级 3D 集成的研究
在本研究中,我们重点研究了通过粘合剂粘接实现晶圆级磷化铟(InP)光子膜与 InP 电子器件三维(3D)集成的关键工艺开发。首先,我们确定了最关键的步骤,并对其进行了优化,以实现共同集成过程中组件的高度热兼容性和机械兼容性。接着,我们开发了一种具有高拓扑容差的 InP 到 InP 晶圆键合策略,并引入了硬苯并环丁烯(BCB)锚,以保持键合后的对准和 BCB 厚度均匀性。所形成的键合层在物理和机械性能方面是均匀的。最后,我们开发了一种新方法,通过湿法蚀刻选择性地从光子侧移除 InP 衬底,同时用多层密封涂层保护电子载体晶片。这些关键步骤的研究对于在超短距离($15 ~\mu \text{m}$)内实现光子学和电子学的可扩展三维集成至关重要。
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来源期刊
IEEE Transactions on Semiconductor Manufacturing
IEEE Transactions on Semiconductor Manufacturing 工程技术-工程:电子与电气
CiteScore
5.20
自引率
11.10%
发文量
101
审稿时长
3.3 months
期刊介绍: The IEEE Transactions on Semiconductor Manufacturing addresses the challenging problems of manufacturing complex microelectronic components, especially very large scale integrated circuits (VLSI). Manufacturing these products requires precision micropatterning, precise control of materials properties, ultraclean work environments, and complex interactions of chemical, physical, electrical and mechanical processes.
期刊最新文献
2024 Index IEEE Transactions on Semiconductor Manufacturing Vol. 37 Front Cover Editorial Table of Contents IEEE Transactions on Semiconductor Manufacturing Publication Information
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