{"title":"A 200 - 325 GHz Gain-Boosted J-Band Low-Noise Amplifier in a 130 nm SiGe BiCMOS Technology","authors":"Manuel Koch, Sascha Breun, Robert Weigel","doi":"10.1109/SiRF59913.2024.10438562","DOIUrl":null,"url":null,"abstract":"This paper presents a wideband low-noise amplifier covering the complete J-Band up to the band edge of 325 GHz. A peak gain of 17.4 dB is achieved by a four-stage cascode-based prototype using inductive and capacitive gain boosting techniques. It is manufactured in a 130 nm SiGe BiCMOS technology with $f_{t} / f_{\\max }$ of 350 GHz/450 GHz, respectively. Zero-Ohm lines are applied to bias the amplifier and low-loss Marchand baluns facilitate single-ended measurements. At both edges of the measured frequency range, a gain of at least 17 dB is shown, while a minimum gain of 12.1 dB is reported. Simulations predict a noise figure of 13.1 dB to 17.2 dB and an input-referred compression point better than −23 dBm, making the amplifier suitable for sub-terahertz radar and wireless communication within IEEE 802.15.3d frequency bands. A core chip area of $250 \\times 230 \\mu\\mathrm{~m}^{2}$ and a DC power of 162 mW are required.","PeriodicalId":518479,"journal":{"name":"2024 IEEE 24th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SiRF)","volume":"225 3","pages":"67-70"},"PeriodicalIF":0.0000,"publicationDate":"2024-01-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2024 IEEE 24th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SiRF)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SiRF59913.2024.10438562","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
This paper presents a wideband low-noise amplifier covering the complete J-Band up to the band edge of 325 GHz. A peak gain of 17.4 dB is achieved by a four-stage cascode-based prototype using inductive and capacitive gain boosting techniques. It is manufactured in a 130 nm SiGe BiCMOS technology with $f_{t} / f_{\max }$ of 350 GHz/450 GHz, respectively. Zero-Ohm lines are applied to bias the amplifier and low-loss Marchand baluns facilitate single-ended measurements. At both edges of the measured frequency range, a gain of at least 17 dB is shown, while a minimum gain of 12.1 dB is reported. Simulations predict a noise figure of 13.1 dB to 17.2 dB and an input-referred compression point better than −23 dBm, making the amplifier suitable for sub-terahertz radar and wireless communication within IEEE 802.15.3d frequency bands. A core chip area of $250 \times 230 \mu\mathrm{~m}^{2}$ and a DC power of 162 mW are required.