Universal Dielectric Breakdown Modeling Under Off-State TDDB for Ultra-Scaled Device From 130nm to 28nm Nodes and Beyond

Abstract

This study investigates the commonality Of TDDB under Off-state conditions across a range of CMOS nodes, from 130nm to ultra-scaled devices, i.e., 28nm FDSOI CMOS. To achieve this, Off-mode gate-oxide breakdown is analyzed under non-uniform electric field to investigate the effects of stress-induced leakage current, channel current, and lateral electric field in dielectric breakdown mechanism related to RF operations using ultra short channel devices. Oxide breakdown is characterized under DC stress with different gate-length LG as a function of drain voltage VDS and temperature. The study indicates that sub-threshold leakage current is a critical factor in determining the Off-state TDDB degradation, which is caused by a combination of band-to-band tunneling mechanism, junction current and impact ionization phenomena. The proposed Off-state TDDB compact model confirms that the leakage current is a reliable indicator of TDDB dependence precursor to hard-breakdown. Additionally, the paper discusses potential causes of the higher form factor $\beta $ value for PFET under Off-mode stressing, which may be attributed to high impact ionization, non-conducting hot-carrier effects, defect generation kinetics and a thinner defect cell size.