Design of Novel Low Power 6T XNOR based Full Adder and Full Subtractor and Comparison of Various Adders and Subtractors

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Abstract

Portable high speed digital devices are an emerging area and the designing of such circuits in VLSI is the need of the hour. Arithmetic and logic functions are the main blocks of such designs. Adders and subtractors are used in complex data processing to perform arithmetic operations. Designing of adders and subtractor using 6T XNOR demonstrates Low power, high speed switching and also optimized Area by means of transistor count compared to conventional adders and subtractors. This paper presents novel approach for 6T XNOR based full adder and full subtractor circuits. The circuit realization has been performed using DSCH and waveforms are obtained by using Micro wind 3.1
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基于 6T XNOR 的新型低功耗全加法器和全减法器的设计以及各种加法器和减法器的比较
便携式高速数字设备是一个新兴领域,用超大规模集成电路设计这类电路是当务之急。算术和逻辑功能是此类设计的主要组成部分。加法器和减法器用于复杂的数据处理,以执行算术运算。与传统的加法器和减法器相比,使用 6T XNOR 设计的加法器和减法器不仅功耗低、开关速度快,而且通过晶体管数量优化了面积。本文介绍了基于 6T XNOR 的全加法器和全减法器电路的新方法。电路使用 DSCH 实现,波形使用 Micro wind 3.1 获得。
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