{"title":"Blue Laser Diode Annealed Top-Gate Low Temperature Poly-Si TFTs With Low Resistance of Source/Drain From Deposited n+ Layer","authors":"Hongyuan Xu;Guangmiao Wan;Xu Wang;Xiaoliang Zhou;Jing Liu;Jinming Li;Lei Lu;Shengdong Zhang","doi":"10.1109/JEDS.2024.3392183","DOIUrl":null,"url":null,"abstract":"In this letter, a high performance and large area feasible top-gate low-temperature polysilicon thin film transistor (LTPS TFT) technology is reported. The poly-Si active layer was formed by crystallizing the plasma enhanced chemical vapor deposited (PECVD) amorphous silicon (a-Si) film using the blue laser diode anneal (BLDA) technique. The low resistance of source-drain (S/D) regions were formed from a heavily-doped PECVD a-Si layer. The fabricated top-gate LTPS TFTs exhibit excellent electrical performances, with the carrier mobility more than 556.66 cm2/V-s and on/off-current ratio over <inline-formula> <tex-math>$1.58\\times 10^{7}$ </tex-math></inline-formula>. This proposed technology is expected to promote the manufacturing lines to the higher generations.","PeriodicalId":13210,"journal":{"name":"IEEE Journal of the Electron Devices Society","volume":"12 ","pages":"365-368"},"PeriodicalIF":2.4000,"publicationDate":"2024-04-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10506233","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Journal of the Electron Devices Society","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/10506233/","RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0
Abstract
In this letter, a high performance and large area feasible top-gate low-temperature polysilicon thin film transistor (LTPS TFT) technology is reported. The poly-Si active layer was formed by crystallizing the plasma enhanced chemical vapor deposited (PECVD) amorphous silicon (a-Si) film using the blue laser diode anneal (BLDA) technique. The low resistance of source-drain (S/D) regions were formed from a heavily-doped PECVD a-Si layer. The fabricated top-gate LTPS TFTs exhibit excellent electrical performances, with the carrier mobility more than 556.66 cm2/V-s and on/off-current ratio over $1.58\times 10^{7}$ . This proposed technology is expected to promote the manufacturing lines to the higher generations.
期刊介绍：
The IEEE Journal of the Electron Devices Society (J-EDS) is an open-access, fully electronic scientific journal publishing papers ranging from fundamental to applied research that are scientifically rigorous and relevant to electron devices. The J-EDS publishes original and significant contributions relating to the theory, modelling, design, performance, and reliability of electron and ion integrated circuit devices and interconnects, involving insulators, metals, organic materials, micro-plasmas, semiconductors, quantum-effect structures, vacuum devices, and emerging materials with applications in bioelectronics, biomedical electronics, computation, communications, displays, microelectromechanics, imaging, micro-actuators, nanodevices, optoelectronics, photovoltaics, power IC''s, and micro-sensors. Tutorial and review papers on these subjects are, also, published. And, occasionally special issues with a collection of papers on particular areas in more depth and breadth are, also, published. J-EDS publishes all papers that are judged to be technically valid and original.
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