{"title":"Unveiling Sub-60 mV/decade Subthreshold Swing in The Oxide Local Thinning (OLT) Gated MIS Tunnel Diodes by TCAD Simulations","authors":"Sung-Wei Huang, Jun-Yu Lin, J. Hwu","doi":"10.1149/11305.0009ecst","DOIUrl":null,"url":null,"abstract":"In this study, we unveil the sub-60 mV/decade subthreshold swing (SS) characteristics observed in the oxide local thinning (OLT) gated p-type metal-insulator-semiconductor (MIS) tunnel diodes (TD) utilizing TCAD simulations. Through our simulations, we successfully replicate the sub-60 mV/decade SS behavior and attribute this remarkable characteristic to the rapid increase in electron density near the gate edge. This phenomenon arises from electron injection through the gate OLT region under a negative gate voltage, leading to a significant elevation in electron density near the gate edge. Armed with this insight, we design scaled devices to assess the feasibility of achieving sub-60 mV/decade SS behavior. By modulating the substrate thickness, we effectively simulate devices with SS lower than 60 mV/decade across a current range spanning 8 orders of magnitude.","PeriodicalId":11473,"journal":{"name":"ECS Transactions","volume":"41 9","pages":""},"PeriodicalIF":0.0000,"publicationDate":"2024-05-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"ECS Transactions","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1149/11305.0009ecst","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
In this study, we unveil the sub-60 mV/decade subthreshold swing (SS) characteristics observed in the oxide local thinning (OLT) gated p-type metal-insulator-semiconductor (MIS) tunnel diodes (TD) utilizing TCAD simulations. Through our simulations, we successfully replicate the sub-60 mV/decade SS behavior and attribute this remarkable characteristic to the rapid increase in electron density near the gate edge. This phenomenon arises from electron injection through the gate OLT region under a negative gate voltage, leading to a significant elevation in electron density near the gate edge. Armed with this insight, we design scaled devices to assess the feasibility of achieving sub-60 mV/decade SS behavior. By modulating the substrate thickness, we effectively simulate devices with SS lower than 60 mV/decade across a current range spanning 8 orders of magnitude.