Stabilization of Morphotropic Phase Boundary in Hafnia Via Microwave Low‐temperature Crystallization Process for Next‐generation DRAM Technology

Hunbeom Shin, Giuk Kim, Sujeong Lee, Hyojun Choi, Sangho Lee, Sangmok Lee, Yunseok Nam, Geonhyeong Kang, Hyungjun Kim, Jinho Ahn, Sanghun Jeon
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Abstract

The morphotropic phase boundary (MPB), which arises from the combination of antiferroelectric and ferroelectric phases, demonstrates the highest dielectric constant (κ) compared to other phases. This emphasizes its potential as a leading contender for dielectric films in future DRAM capacitors. MPB‐based high‐κ materials using hafnia have shown a trade‐off between equivalent oxide thickness (EOT) and leakage current density (Jleak) when the crystallization temperature increases with scaling the thickness. In this study, we employed a microwave annealing (MWA) method that can achieve low‐temperature crystallization below 350 °C. The purpose of this method is to mitigate the trade‐off relationships and achieve the strict criteria of current DRAM capacitors. These criteria include low EOT (less than 4 Å) and Jleak (less than 10‐7 A/cm2 at 0.8 V) characteristics. The MWA is capable of relatively low‐temperature annealing by supplying energy to the films through both thermal energy and dipole vibration energy. As a result, we achieved a record low EOT of 3.76 Å and a low leakage current characteristic of 4.2×10‐8 A/cm2 at 0.8 V concurrently. We are confident that our research can be important in addressing the challenges associated with reducing the size of next‐generation DRAM capacitors.This article is protected by copyright. All rights reserved.
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通过微波低温结晶工艺稳定哈夫尼亚中的各向异性相界,促进下一代 DRAM 技术的发展
由反铁电相和铁电相组合而成的形态相界(MPB)与其他相位相比,具有最高的介电常数(κ)。这凸显了它作为未来 DRAM 电容器介电薄膜主要竞争者的潜力。当结晶温度随着厚度的增加而增加时,使用哈夫尼亚的基于 MPB 的高κ材料显示出等效氧化物厚度(EOT)和漏电流密度(Jleak)之间的权衡。在本研究中,我们采用了一种微波退火 (MWA) 方法,该方法可实现低于 350 °C 的低温结晶。这种方法的目的是缓解权衡关系,实现当前 DRAM 电容器的严格标准。这些标准包括低 EOT(小于 4 Å)和 Jleak(0.8 V 时小于 10-7 A/cm2 )特性。MWA 能够通过热能和偶极振动能向薄膜提供能量,从而实现相对低温退火。因此,我们同时实现了 3.76 Å 的创纪录低 EOT 和 0.8 V 时 4.2×10-8 A/cm2 的低漏电流特性。我们相信,我们的研究对解决与缩小下一代 DRAM 电容器尺寸相关的挑战具有重要意义。本文受版权保护。
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