Towards Efficient On-Chip Communication: A Survey on Silicon Nanophotonics and Optical Networks-on-Chip

Abstract

Silicon nanophotonics, with its high-speed, low-loss optical interconnects, and high computation capabilities, is seen as one of the promising technologies that can easily enable the transition from low data computation systems to high data computation systems. By providing faster and more energy-efficient communication, silicon nanophotonics is helping to drive the development of more powerful and efficient computing systems that can handle larger amounts of data.

These advantages of silicon nanophotonics have been leveraged by academia and industry to design the alternative for electrical interconnects, i.e., Optical Network-on-Chip (ONoC). The ONoCs offer higher bandwidth and lower power consumption communication framework as compared to the electrical interconnects. It is expected that the electrical interconnects will continue to be replaced by optical interconnects as the demand for higher bandwidth and faster communication continues to grow. However, there are some challenges in the design of optical interconnects, some of which are attributed to the intrinsic nature of silicon nanophotonic devices such as fabrication challenges and some are associated solely with the ONoCs such as high static power consumption. The research community has been actively involved in handling these challenges in order to fully realize the silicon nanophotonics for communication and computation.

In this research article, we present a comprehensive survey of the current state-of-the-art ONoCs, including their design, fabrication, and performance. We also provide an overview of the significant challenges and limitations associated with ONoCs and discuss potential solutions. The goal of this survey is to provide a comprehensive overview of the field and to inform future research directions in the area of ONoCs.