A novel low-power full swing hybrid full adder-based 7:3 counter for MBW multiplier

Abstract

Counter circuits play a crucial role in Modified Booth Wallace (MBW) tree multiplier architectures, serving as fundamental partial product accumulation circuits. In this paper, we propose a novel architecture for a low-power 7:3 counter based on hybrid full adders (HFAs). Two new designs of HFAs are introduced to realize this counter, enabling the implementation of a 7:3 counter with only 54 transistors. Simulation results demonstrate that the proposed HFA-based 7:3 counter architecture consumes a power of 22.6 µW with a latency of 305 ps, showcasing significant improvements in power-delay-product compared to state-of-the-art designs.