A Radar-Based System for Detection of Human Fall Utilizing Analog Hardware Architectures of Decision Tree Model

IF 2.4 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC IEEE open journal of circuits and systems Pub Date : 2024-03-30 DOI:10.1109/OJCAS.2024.3407663
Vassilis Alimisis;Dimitrios G. Arnaoutoglou;Emmanouil Anastasios Serlis;Argyro Kamperi;Konstantinos Metaxas;George A. Kyriacou;Paul P. Sotiriadis
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Abstract

A fall-detection system was implemented utilizing a 2.45 GHz continuous wave radar along with power-efficient and fully-analog integrated classifier architectures. The Power Burst Curve and the effective acceleration were derived from the short time Fourier transform, and then processed by the analog classifier. The proposed classifier architectures are based on different approximations of the Decision tree classification model. The architectures consist of three main building blocks: sigmoid function circuit, analog multiplier and an argmax operator circuit. To assess the hardware design, a thorough analysis is performed, comparing it to commonly used analog classifiers while exploiting the extracted data. The architectures were trained using Python and were compared to software-based classifiers. The circuit designs were executed using TSMC’s 90 nm CMOS process technology and the Cadence IC Suite was employed for tasks including design, schematic implementation, and post-layout simulations.
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利用决策树模型模拟硬件架构的人体坠落雷达探测系统
利用 2.45 GHz 连续波雷达和高能效全模拟集成分类器架构,实现了跌倒检测系统。功率突发曲线和有效加速度由短时傅立叶变换得出,然后由模拟分类器进行处理。所提出的分类器架构基于决策树分类模型的不同近似值。这些架构由三个主要构件组成:sigmoid 函数电路、模拟乘法器和 argmax 运算器电路。为了评估硬件设计,我们进行了全面分析,将其与常用的模拟分类器进行比较,同时利用提取的数据。使用 Python 对架构进行了训练,并与基于软件的分类器进行了比较。电路设计采用台积电的 90 纳米 CMOS 工艺技术,并使用 Cadence IC Suite 完成设计、原理图实现和布局后仿真等任务。
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