Genggeng Liu , Zhengyang Chen , Zhisheng Chen , Bowen Liu , Yu Zhang , Xing Huang
{"title":"Physical design for microfluidic biochips considering actual volume management and channel storage","authors":"Genggeng Liu , Zhengyang Chen , Zhisheng Chen , Bowen Liu , Yu Zhang , Xing Huang","doi":"10.1016/j.vlsi.2024.102228","DOIUrl":null,"url":null,"abstract":"<div><p>In recent years, microfluidic biochips have been widely applied in various fields of human society. The optimization design of system-architecture based on continuous-flow microfluidic biochips has been widely studied. However, most previous work was based on the traditional chip architecture with dedicated storage, which not only limits the performance of biochips but also increases their manufacturing costs. In order to improve the execution efficiency and reduce the manufacturing cost, a distributed channel-storage architecture can be used to temporarily cache intermediate fluids in idle flow channels. Under this architecture, careful consideration of the volume management of the fluid to be cached is a prerequisite for ensuring the reliability of bioassay results. However, the existing work has not considered the volume management of the fluid to be cached in detail. This may cause the volume of the fluid to not match the capacity of the storage channel, which can contaminate other fluids and lead to incorrect bioassay results or increase the manufacturing cost of biochips due to long storage channels. In this paper, we propose a physical design method for microfluidic biochips that considers the actual volume of fluid while utilizing distributed channel storage. We address this problem by taking a placement and routing co-design strategy throughout the iterative process of the simulated annealing algorithm. Experimental results under multiple benchmarks show that the proposed method can effectively reduce the completion time of bioassays, minimize the flow path length, and decrease the number of intersections.</p></div>","PeriodicalId":54973,"journal":{"name":"Integration-The Vlsi Journal","volume":null,"pages":null},"PeriodicalIF":2.2000,"publicationDate":"2024-06-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Integration-The Vlsi Journal","FirstCategoryId":"5","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/S0167926024000920","RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE","Score":null,"Total":0}
引用次数: 0
Abstract
In recent years, microfluidic biochips have been widely applied in various fields of human society. The optimization design of system-architecture based on continuous-flow microfluidic biochips has been widely studied. However, most previous work was based on the traditional chip architecture with dedicated storage, which not only limits the performance of biochips but also increases their manufacturing costs. In order to improve the execution efficiency and reduce the manufacturing cost, a distributed channel-storage architecture can be used to temporarily cache intermediate fluids in idle flow channels. Under this architecture, careful consideration of the volume management of the fluid to be cached is a prerequisite for ensuring the reliability of bioassay results. However, the existing work has not considered the volume management of the fluid to be cached in detail. This may cause the volume of the fluid to not match the capacity of the storage channel, which can contaminate other fluids and lead to incorrect bioassay results or increase the manufacturing cost of biochips due to long storage channels. In this paper, we propose a physical design method for microfluidic biochips that considers the actual volume of fluid while utilizing distributed channel storage. We address this problem by taking a placement and routing co-design strategy throughout the iterative process of the simulated annealing algorithm. Experimental results under multiple benchmarks show that the proposed method can effectively reduce the completion time of bioassays, minimize the flow path length, and decrease the number of intersections.
期刊介绍:
Integration''s aim is to cover every aspect of the VLSI area, with an emphasis on cross-fertilization between various fields of science, and the design, verification, test and applications of integrated circuits and systems, as well as closely related topics in process and device technologies. Individual issues will feature peer-reviewed tutorials and articles as well as reviews of recent publications. The intended coverage of the journal can be assessed by examining the following (non-exclusive) list of topics:
Specification methods and languages; Analog/Digital Integrated Circuits and Systems; VLSI architectures; Algorithms, methods and tools for modeling, simulation, synthesis and verification of integrated circuits and systems of any complexity; Embedded systems; High-level synthesis for VLSI systems; Logic synthesis and finite automata; Testing, design-for-test and test generation algorithms; Physical design; Formal verification; Algorithms implemented in VLSI systems; Systems engineering; Heterogeneous systems.