Elevating haptic interfaces: Dual-rate sampling and field programmable gate array implementation for multi-degree-of-freedom performance enhancement

IF 3.4 Q1 ENGINEERING, MECHANICAL 国际机械系统动力学学报(英文) Pub Date : 2024-06-05 DOI:10.1002/msd2.12115
Majid Koul, Suhail Khosa, Babar Ahmad
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Abstract

In this work, our primary focus centered on exploring the adaptability of the dual-rate sampling scheme proposed earlier to enhance the performance of multi-degree-of-freedom (multi-DOF) impedance-based haptic interfaces. The scheme employed independent sampling rates in a haptics controller, effectively mitigating the issue of reduced Z-width at higher sampling rates. A key aspect of our investigation was the intricate implementation of the dual-rate sampling scheme on a field programmable gate array (FPGA). This implementation on a logic hardware FPGA was challenging and led to the effective comparison of the uniform-rate and dual-rate sampling schemes of the multi-DOF haptic controller. We used an in-house developed two-DOF pantograph as the haptic interface and an FPGA for implementing the controller strategy. FPGA-based implementation presented challenges that were vital in testing controller performances at higher sampling rates. Virtual wall experiments were conducted to determine the stable and unstable interactions with the virtual wall. To complement the experimental results, we simulated the haptics force law for multi-DOF system on Simulink/MATLAB. Notably, the dual-rate sampling approach maintained the Z-width of the two-DOF haptic interface, even at higher controller sampling rates, distinguishing it from the conventional two-DOF uniform-rate control scheme. For example, employing a dual-rate sampling combination of 20–2 kHz consistently ensured the stable rendering of a maximum virtual stiffness of approximately 700 N/mm and maintained a reliable virtual damping range spanning from 0 to 5 Ns/mm. In contrast, the 20 kHz uniform-rate sampling approach failed to ensure interface stability in the presence of virtual damping, ultimately resulting in the unsuccessful implementation of any virtual stiffness at higher sampling rates. This work, therefore, establishes the potential of dual-rate sampling in the realm of haptic technology, with practical applications in multi-DOF systems.

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提升触觉界面:双速率采样和现场可编程门阵列实现多自由度性能提升
在这项工作中,我们的主要重点是探索早先提出的双速率采样方案的适应性,以提高基于阻抗的多自由度(multi-DOF)触觉界面的性能。该方案在触觉控制器中采用了独立的采样率,有效缓解了采样率较高时 Z 宽减小的问题。我们研究的一个关键方面是在现场可编程门阵列(FPGA)上复杂地实施双速率采样方案。在逻辑硬件 FPGA 上实现该方案具有挑战性,这使得我们能够有效地比较多多维触觉控制器的统一速率和双速率采样方案。我们使用内部开发的二维受电弓作为触觉接口,并使用 FPGA 实施控制器策略。基于 FPGA 的实施带来了挑战,这对测试控制器在更高采样率下的性能至关重要。我们进行了虚拟墙实验,以确定与虚拟墙的稳定和不稳定交互。为了对实验结果进行补充,我们在 Simulink/MATLAB 上模拟了多多自由度系统的触觉力法。值得注意的是,即使在控制器采样率较高的情况下,双速率采样方法仍能保持二维触觉界面的 Z 宽度,这使其有别于传统的二维均匀速率控制方案。例如,采用 20-2 千赫的双速率采样组合可持续确保稳定呈现约 700 牛顿/毫米的最大虚拟刚度,并保持 0 至 5 牛顿/毫米的可靠虚拟阻尼范围。相比之下,20 kHz 的均匀速率采样方法无法确保虚拟阻尼存在时的界面稳定性,最终导致在更高采样率下无法成功实现任何虚拟刚度。因此,这项工作证明了双速率采样在触觉技术领域的潜力,并可实际应用于多自由度系统。
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