Design and application of multiscroll chaotic attractors based on memristors

IF 2.2 3区 工程技术 Q3 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE Integration-The Vlsi Journal Pub Date : 2024-06-27 DOI:10.1016/j.vlsi.2024.102235
Jie Zhang, Xiaodong Wei, Jiangang Zuo, Nana Cheng, Jiliang Lv
{"title":"Design and application of multiscroll chaotic attractors based on memristors","authors":"Jie Zhang,&nbsp;Xiaodong Wei,&nbsp;Jiangang Zuo,&nbsp;Nana Cheng,&nbsp;Jiliang Lv","doi":"10.1016/j.vlsi.2024.102235","DOIUrl":null,"url":null,"abstract":"<div><p>A multi-segment nonlinear memristor model with controllable parameters is simplified significantly reducing circuit costs without compromising circuit performance. Different quantities of simplified memristor models are introduced into an improved Shimizu and Morioka (S-M) system, which constitute the one-directional memristive multiscroll chaotic attractor (1D-MMSCA) and the two-directional memristive multiscroll chaotic attractor (2D-MMSCA). Dynamical analysis is conducted from equilibrium points, Lyapunov exponents and bifurcation diagrams, Poincaré map, 0–1 tests, complexity, coexisting attractors, and National Institute of Standards and Technology (NIST) test. The Lyapunov exponents and bifurcation diagrams revealed that 1D-MMSCA exhibit rich dynamical behaviors, including fixed points, periodic orbits, transient quasi-periodic cycles, limit cycles, and period-doubling bifurcations. The 2D-MMSCA demonstrates simultaneous homogeneous and heterogeneous multi-stability and extreme multi-stability. Furthermore, an analog circuit is designed and simulated, and the results verify the circuit realizability and correctness of the MMSCAs. By utilizing an improved Euler algorithm and STM32 microcontroller, the implementation of MMSCAs are achieved, enhancing their applicability in the embedded systems domain. Finally, the drive-response synchronization constructed based on 1D-MMSCA exhibits a wide adjustable synchronization time, ranging from 49.3 s to 0.18 s. This significantly expands the application scope of the system. Additionally, a chaotic analog encrypted communication system has been developed using this synchronization framework. These advancements substantially enhance both the efficiency and practicality of the synchronization system.</p></div>","PeriodicalId":54973,"journal":{"name":"Integration-The Vlsi Journal","volume":null,"pages":null},"PeriodicalIF":2.2000,"publicationDate":"2024-06-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Integration-The Vlsi Journal","FirstCategoryId":"5","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/S0167926024000993","RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE","Score":null,"Total":0}
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Abstract

A multi-segment nonlinear memristor model with controllable parameters is simplified significantly reducing circuit costs without compromising circuit performance. Different quantities of simplified memristor models are introduced into an improved Shimizu and Morioka (S-M) system, which constitute the one-directional memristive multiscroll chaotic attractor (1D-MMSCA) and the two-directional memristive multiscroll chaotic attractor (2D-MMSCA). Dynamical analysis is conducted from equilibrium points, Lyapunov exponents and bifurcation diagrams, Poincaré map, 0–1 tests, complexity, coexisting attractors, and National Institute of Standards and Technology (NIST) test. The Lyapunov exponents and bifurcation diagrams revealed that 1D-MMSCA exhibit rich dynamical behaviors, including fixed points, periodic orbits, transient quasi-periodic cycles, limit cycles, and period-doubling bifurcations. The 2D-MMSCA demonstrates simultaneous homogeneous and heterogeneous multi-stability and extreme multi-stability. Furthermore, an analog circuit is designed and simulated, and the results verify the circuit realizability and correctness of the MMSCAs. By utilizing an improved Euler algorithm and STM32 microcontroller, the implementation of MMSCAs are achieved, enhancing their applicability in the embedded systems domain. Finally, the drive-response synchronization constructed based on 1D-MMSCA exhibits a wide adjustable synchronization time, ranging from 49.3 s to 0.18 s. This significantly expands the application scope of the system. Additionally, a chaotic analog encrypted communication system has been developed using this synchronization framework. These advancements substantially enhance both the efficiency and practicality of the synchronization system.

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基于忆阻器的多卷混沌吸引器的设计与应用
简化了参数可控的多段非线性忆阻器模型,大大降低了电路成本,同时不影响电路性能。不同数量的简化忆阻器模型被引入改进的清水和盛冈(S-M)系统,构成单向忆阻器多卷混沌吸引子(1D-MMSCA)和双向忆阻器多卷混沌吸引子(2D-MMSCA)。从平衡点、Lyapunov 指数和分岔图、Poincaré 地图、0-1 检验、复杂性、共存吸引子和美国国家标准与技术研究院(NIST)检验等方面进行了动力学分析。李亚普诺夫指数和分岔图显示,一维-MMSCA 表现出丰富的动力学行为,包括定点、周期轨道、瞬态准周期循环、极限循环和周期加倍分岔。2D-MMSCA 同时表现出同质和异质多稳定性以及极端多稳定性。此外,还设计和模拟了模拟电路,结果验证了 MMSCA 的电路可实现性和正确性。通过利用改进的欧拉算法和 STM32 微控制器,实现了 MMSCA,增强了其在嵌入式系统领域的适用性。最后,基于 1D-MMSCA 构建的驱动-响应同步系统的同步时间可调范围很广,从 49.3 秒到 0.18 秒不等。此外,利用这一同步框架还开发出了混沌模拟加密通信系统。这些进步大大提高了同步系统的效率和实用性。
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来源期刊
Integration-The Vlsi Journal
Integration-The Vlsi Journal 工程技术-工程:电子与电气
CiteScore
3.80
自引率
5.30%
发文量
107
审稿时长
6 months
期刊介绍: Integration''s aim is to cover every aspect of the VLSI area, with an emphasis on cross-fertilization between various fields of science, and the design, verification, test and applications of integrated circuits and systems, as well as closely related topics in process and device technologies. Individual issues will feature peer-reviewed tutorials and articles as well as reviews of recent publications. The intended coverage of the journal can be assessed by examining the following (non-exclusive) list of topics: Specification methods and languages; Analog/Digital Integrated Circuits and Systems; VLSI architectures; Algorithms, methods and tools for modeling, simulation, synthesis and verification of integrated circuits and systems of any complexity; Embedded systems; High-level synthesis for VLSI systems; Logic synthesis and finite automata; Testing, design-for-test and test generation algorithms; Physical design; Formal verification; Algorithms implemented in VLSI systems; Systems engineering; Heterogeneous systems.
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