Secure Edge-Coded Signaling IoT Transceiver With Reduced Encryption Overhead

Abstract

The edge-coded signaling (ECS) protocol enables single-wire signaling in IoT devices and sensors using two important neuromorphic attributes. The first is the coding of bits as a stream of pulses (spikes), and the second is the circumvention of clock and data recovery (CDR) at the receiver. In addition, ECS can be endowed with strong, yet lightweight, security features using an ultralow-latency version of the A5/1 stream cipher. Such strong security comes at the expense of decreased data rates and significant area overhead. In this article, we introduce a new generation of secure ECS protocols that incorporates two notable improvements. The first is a more compact pulse stream definition that results in improved data rates for the plain ECS protocol. The second is a coding-aware version of the low-latency A5/1 stream cipher that results in minimal impact on the effective data rate of the transmission. Consequently, a new all-digital and secure ECS transceiver design is proposed, prototyped, and functionally verified in 65-nm technology. Compared with previous generations of secure ECS transceivers, this new design achieves an increase of approximately 138%, 199%, and 640% in minimum, average, and maximum data rates, respectively, and results in increased resiliency against brute-force attacks by a factor of 16. Furthermore, the ASIC implementation shows that it maintains the compact and energy-efficient features of the ECS architecture, using only $28~\mu $ W with an average energy efficiency of 2.745 pJ/bit and a gate count of approximately 2880 gates. This is more than 40% decrease in the equivalent gate count relative to the previous secure ECS generation.