ADC Dynamic Parameter Testing Scheme Under Relaxed Conditions

Jun Yuan, Yuyang Zhang, Liangrui Zhang, Shuaiqi Hou, Yukun Han
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Abstract

Traditional ADC dynamic parameter testing algorithms have high requirements for signal amplitude, purity, and coherence, which not only have high test cost but also low efficiency. Therefore, a set of ADC dynamic parameter testing algorithms was developed to relax the testing conditions. The algorithm fits the clipped signal through an interpolated fitting algorithm to obtain the residual sequence to relax the input signal amplitude limit; reduces the parameter fitting error and spectral leakage on the spurious components by data preprocessing, restores the ADC's own parameters by external noise cancellation method. Under 14-bit signal source, 5.2-V amplitude, and 0.3 leakage, the signal-to-noise ratio, signal-to-noise-and-distortion ratio, effective-number- of-bits, and total-harmonic-distortion of the 16-bit ADC chip 7606 have errors from the typical values of 0.39 dB, 0.23 dB, 0.16 bit, and 7.24 dB, respectively, which are within the manual range. The results demonstrate the functionality and robustness of the proposed relaxed testing algorithm.

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宽松条件下的 ADC 动态参数测试方案
传统的 ADC 动态参数测试算法对信号幅度、纯度和相干性要求较高,不仅测试成本高,而且效率低。因此,我们开发了一套 ADC 动态参数测试算法来放宽测试条件。该算法通过插值拟合算法对削波信号进行拟合,得到残差序列,放宽输入信号幅度限制;通过数据预处理减少参数拟合误差和对杂散成分的频谱泄漏,通过外部噪声消除方法恢复 ADC 自身参数。在 14 位信号源、5.2 V 振幅和 0.3 泄漏条件下,16 位 ADC 芯片 7606 的信噪比、信噪比与失真比、有效位数和总谐波失真与典型值的误差分别为 0.39 dB、0.23 dB、0.16 bit 和 7.24 dB,均在手册规定范围内。这些结果证明了所提出的宽松测试算法的功能性和鲁棒性。
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