Dongxing Fang, Kaiming Nie, Ziyang Zhang, Jiangtao Xu
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引用次数: 0
Abstract
This paper presents a two-step single-slope (TS-SS) analog-to-digital converter (ADC) for CMOS image sensors (CIS). The proposed TS-SS ADC divides the pixel signal into small and large signal regions using a precomparator. When quantizing large pixel signals, the TS-SS ADC enters accelerated mode, which leverages the differential topology of the ramp generator to speed up quantization. The accelerated mode reduces the row cycle, resulting in a 31.3% reduction at 320 MHz clock from 27.3 to 18.75 µs. The designed 12-bit TS-SS ADC was designed in a 110 nm 1P4M CMOS technology, and its linearity was verified by process corner post-simulation and Monte Carlo simulation.
期刊介绍：
Rapid developments in the analog and digital processing of signals for communication, control, and computer systems have made the theory of electrical circuits and signal processing a burgeoning area of research and design. The aim of Circuits, Systems, and Signal Processing (CSSP) is to help meet the needs of outlets for significant research papers and state-of-the-art review articles in the area.
The scope of the journal is broad, ranging from mathematical foundations to practical engineering design. It encompasses, but is not limited to, such topics as linear and nonlinear networks, distributed circuits and systems, multi-dimensional signals and systems, analog filters and signal processing, digital filters and signal processing, statistical signal processing, multimedia, computer aided design, graph theory, neural systems, communication circuits and systems, and VLSI signal processing.
The Editorial Board is international, and papers are welcome from throughout the world. The journal is devoted primarily to research papers, but survey, expository, and tutorial papers are also published.
Circuits, Systems, and Signal Processing (CSSP) is published twelve times annually.
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