NeuroREC: A 28-nm Efficient Neuromorphic Processor for Radar Emitter Classification

IF 5.2 1区 工程技术 Q1 ENGINEERING, ELECTRICAL & ELECTRONIC IEEE Transactions on Circuits and Systems I: Regular Papers Pub Date : 2024-07-25 DOI:10.1109/TCSI.2024.3427385
Zilin Wang;Zehong Ou;Yi Zhong;Youming Yang;Li Lun;Hufei Li;Jian Cao;Xiaoxin Cui;Song Jia;Yuan Wang
{"title":"NeuroREC: A 28-nm Efficient Neuromorphic Processor for Radar Emitter Classification","authors":"Zilin Wang;Zehong Ou;Yi Zhong;Youming Yang;Li Lun;Hufei Li;Jian Cao;Xiaoxin Cui;Song Jia;Yuan Wang","doi":"10.1109/TCSI.2024.3427385","DOIUrl":null,"url":null,"abstract":"Radar emitter classification (REC) plays an important role in modern warfare. Traditional REC methods have difficulty identifying complex radar signals in the present day. Inspired by biology, spiking neural networks (SNNs) have gradually gained widespread attention due to their low power characteristics. Compared with convolutional neural networks (CNNs), SNNs are more suitable for application in the field of REC. The reason is that SNN can not only maintain higher accuracy in the presence of noise interference, but also reduce the power consumption of mobile devices. However, it is challenging to make full use of the input sparsity of radar emitter signals and the weight sparsity of pruned SNN models. In this paper, a 28-nm neuromorphic processor for REC named NeuroREC is proposed. It uses matrix compression algorithms to store sparse weights on chip, and designs corresponding spike detection circuits for this purpose. As a single-core design, we propose a ping-pong running mechanism to alleviate the imbalance between IO throughput and peak performance. Two SNN models for classifying RadioML2016.b and RadioML2018.a datasets are deployed on the chip, achieving competitive accuracy with only 8 timesteps, and demonstrating better robustness than CNN. Fabricated in 28-nm CMOS process, NeuroREC runs at frequencies ranging from 22.5MHz to 744MHz. Under specific sparsity conditions, it can reach an energy efficiency of 7.22TSOP/W for 8-bit weight.","PeriodicalId":13039,"journal":{"name":"IEEE Transactions on Circuits and Systems I: Regular Papers","volume":"71 12","pages":"6215-6228"},"PeriodicalIF":5.2000,"publicationDate":"2024-07-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Transactions on Circuits and Systems I: Regular Papers","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/10609407/","RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q1","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0

Abstract

Radar emitter classification (REC) plays an important role in modern warfare. Traditional REC methods have difficulty identifying complex radar signals in the present day. Inspired by biology, spiking neural networks (SNNs) have gradually gained widespread attention due to their low power characteristics. Compared with convolutional neural networks (CNNs), SNNs are more suitable for application in the field of REC. The reason is that SNN can not only maintain higher accuracy in the presence of noise interference, but also reduce the power consumption of mobile devices. However, it is challenging to make full use of the input sparsity of radar emitter signals and the weight sparsity of pruned SNN models. In this paper, a 28-nm neuromorphic processor for REC named NeuroREC is proposed. It uses matrix compression algorithms to store sparse weights on chip, and designs corresponding spike detection circuits for this purpose. As a single-core design, we propose a ping-pong running mechanism to alleviate the imbalance between IO throughput and peak performance. Two SNN models for classifying RadioML2016.b and RadioML2018.a datasets are deployed on the chip, achieving competitive accuracy with only 8 timesteps, and demonstrating better robustness than CNN. Fabricated in 28-nm CMOS process, NeuroREC runs at frequencies ranging from 22.5MHz to 744MHz. Under specific sparsity conditions, it can reach an energy efficiency of 7.22TSOP/W for 8-bit weight.
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
NeuroREC:用于雷达发射器分类的 28 纳米高效神经形态处理器
雷达发射器分类(REC)在现代战争中发挥着重要作用。目前,传统的雷达发射器分类方法难以识别复杂的雷达信号。受生物学启发,尖峰神经网络(SNN)因其低功耗特性逐渐受到广泛关注。与卷积神经网络(CNN)相比,SNN 更适合应用于 REC 领域。原因在于,SNN 不仅能在噪声干扰下保持更高的精度,还能降低移动设备的功耗。然而,如何充分利用雷达发射器信号的输入稀疏性和剪枝 SNN 模型的权重稀疏性是一项挑战。本文提出了一种用于 REC 的 28 纳米神经形态处理器,命名为 NeuroREC。它采用矩阵压缩算法在芯片上存储稀疏权重,并为此设计了相应的尖峰检测电路。作为一种单核设计,我们提出了一种乒乓运行机制,以缓解 IO 吞吐量和峰值性能之间的不平衡。我们在芯片上部署了两个用于对 RadioML2016.b 和 RadioML2018.a 数据集进行分类的 SNN 模型,仅用 8 个时间步就实现了具有竞争力的准确性,并展示了比 CNN 更好的鲁棒性。NeuroREC 采用 28 纳米 CMOS 工艺制造,运行频率为 22.5MHz 至 744MHz。在特定的稀疏性条件下,8 位权重的能效可达 7.22TSOP/W。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 去求助
来源期刊
IEEE Transactions on Circuits and Systems I: Regular Papers
IEEE Transactions on Circuits and Systems I: Regular Papers 工程技术-工程:电子与电气
CiteScore
9.80
自引率
11.80%
发文量
441
审稿时长
2 months
期刊介绍: TCAS I publishes regular papers in the field specified by the theory, analysis, design, and practical implementations of circuits, and the application of circuit techniques to systems and to signal processing. Included is the whole spectrum from basic scientific theory to industrial applications. The field of interest covered includes: - Circuits: Analog, Digital and Mixed Signal Circuits and Systems - Nonlinear Circuits and Systems, Integrated Sensors, MEMS and Systems on Chip, Nanoscale Circuits and Systems, Optoelectronic - Circuits and Systems, Power Electronics and Systems - Software for Analog-and-Logic Circuits and Systems - Control aspects of Circuits and Systems.
期刊最新文献
Offline Deep Reinforcement Learning-Based Home Energy Management Systems With Heterogeneous EV Charging Load Models Predictor Feedback Control of Discrete-Time Systems With Multiple State Delays and Distinct Input Delays Low Complexity High Speed Channel Estimation for OTFS on System on Chip A 6–33-GHz Half-Nanosecond True-Time Delay Line With Gain Compensation for Wideband Large-Scale Antenna Array Game-Based Human-Swarm Shared Formation Control Authority Transfer of Manned–Unmanned Aerial Team
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:604180095
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1