Impact of Layout Parameter Mismatches on Short Circuit Reliability of Parallel-Connected Planar, Trench, and Double-Trench SiC MOSFETs

IF 2.5 3区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC IEEE Transactions on Device and Materials Reliability Pub Date : 2024-07-22 DOI:10.1109/TDMR.2024.3431707
Renze Yu;Saeed Jahdi;Konstantinos Floros;Ingo Lüdtke;Phil Mellor
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Abstract

Uneven electro-thermal conditions between parallel-connected devices can reduce the overall reliability of the power electronics systems, particularly during extreme cases such as short circuit. The current distribution between parallel devices is dynamically regulated during the transient and the degradation of devices is intertwined in the long run. To better understand the evolving patterns in the parallel configuration and to compare differences among various device structures, repetitive short circuit tests were conducted on planar, symmetrical double-trench, and asymmetrical trench SiC MOSFETs. Technology computer-aided design (TCAD) models were employed to analyze the evolution of current density and temperature profile between parallel devices. Test results indicate that the switching speed difference caused by gate resistance (Rg) mismatch leads to the asynchronous degradation of asymmetrical trench devices. The decreased threshold voltage (Vth) induce higher short circuit energy (Esc), forming a positive feedback for degradation. Besides, even if the current is dynamically shared between parallel SiC MOSFETs under different case temperature (Tcase), the initial temperature has a key impact on short-circuit reliability over Esc.
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布局参数失配对并联平面、沟槽和双沟槽 SiC MOSFET 短路可靠性的影响
并联设备之间不均匀的电热条件会降低电力电子系统的整体可靠性,尤其是在短路等极端情况下。并联器件之间的电流分布在瞬态期间是动态调节的,而器件的劣化在长期内是相互交织的。为了更好地了解并联配置的演变模式,并比较各种器件结构之间的差异,对平面、对称双沟槽和非对称沟槽 SiC MOSFET 进行了重复短路测试。采用技术计算机辅助设计(TCAD)模型分析了并联器件之间电流密度和温度曲线的演变。测试结果表明,栅极电阻(Rg)不匹配造成的开关速度差异导致了非对称沟槽器件的异步退化。阈值电压(Vth)的降低会导致更高的短路能量(Esc),形成退化的正反馈。此外,即使并联 SiC MOSFET 在不同外壳温度 (Tcase) 下动态分担电流,初始温度也会对 Esc 短路可靠性产生关键影响。
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来源期刊
IEEE Transactions on Device and Materials Reliability
IEEE Transactions on Device and Materials Reliability 工程技术-工程:电子与电气
CiteScore
4.80
自引率
5.00%
发文量
71
审稿时长
6-12 weeks
期刊介绍: The scope of the publication includes, but is not limited to Reliability of: Devices, Materials, Processes, Interfaces, Integrated Microsystems (including MEMS & Sensors), Transistors, Technology (CMOS, BiCMOS, etc.), Integrated Circuits (IC, SSI, MSI, LSI, ULSI, ELSI, etc.), Thin Film Transistor Applications. The measurement and understanding of the reliability of such entities at each phase, from the concept stage through research and development and into manufacturing scale-up, provides the overall database on the reliability of the devices, materials, processes, package and other necessities for the successful introduction of a product to market. This reliability database is the foundation for a quality product, which meets customer expectation. A product so developed has high reliability. High quality will be achieved because product weaknesses will have been found (root cause analysis) and designed out of the final product. This process of ever increasing reliability and quality will result in a superior product. In the end, reliability and quality are not one thing; but in a sense everything, which can be or has to be done to guarantee that the product successfully performs in the field under customer conditions. Our goal is to capture these advances. An additional objective is to focus cross fertilized communication in the state of the art of reliability of electronic materials and devices and provide fundamental understanding of basic phenomena that affect reliability. In addition, the publication is a forum for interdisciplinary studies on reliability. An overall goal is to provide leading edge/state of the art information, which is critically relevant to the creation of reliable products.
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