Four Reduced Precision Redundancy by Approximation (4RPA): Design and Analysis of 4-Module Systems

IF 5.7 2区 计算机科学 Q1 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE IEEE Transactions on Reliability Pub Date : 2024-07-31 DOI:10.1109/TR.2024.3432098
Salin Junsangsri;Fabrizio Lombardi
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Abstract

Reduced precision redundancy (RPR) has been widely used as an alternative to triple modular redundancy to enhance reliable computing with tolerance to errors and faults; however, it still has stringent requirements for power and area as well as complex decision hardware. Recent works have focused on reduced precision redundancy by approximation (RPA) to attain lower delay, smaller power dissipation, and smaller area because RPA operates using only logic operations (so no arithmetic unit is involved as decision hardware). The proposed RPA-based designs can tolerate up to two erroneous modules, so adding a further data word to the decision process compared to previous three-module based RPA designs found in the technical literature. The proposed designs consist of four modules, two exact data words and two approximate data words (denoted as 2E2A), where E (A) stands for exact (approximate) data words. The probability of generating an output exact data word by RPA under one and both data parts of erroneous modules is analytically found; simulation results are also provided. The difference between simulated and analytical probabilities is at most 7.3%. Figures of merits (such as delay, power dissipation, and area) of the proposed designs are assessed by simulation and compared with RPR and the three-module RPA. The proposed designs incur a similar delay as a three-module RPA; power dissipation and area (due to the additional module) can be adjusted by increasing the number of approximate bits while still retaining a two-module error tolerance. This article also presents its application to image processing, and arithmetic (i.e., the addition operation); the results show that the proposed schemes are very efficient.
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四近似降低精度冗余(4RPA):4 模块系统的设计与分析
降低精度冗余(RPR)作为三模冗余的替代方案已被广泛使用,以提高计算的可靠性和容错能力;然而,它对功率和面积的要求仍然很严格,决策硬件也很复杂。最近的研究主要集中在通过近似降低精度冗余(RPA)来实现更低的延迟、更小的功耗和更小的面积,因为RPA只使用逻辑运算(因此不涉及算术单元作为决策硬件)。所提出的基于RPA的设计最多可以容忍两个错误模块,因此与之前在技术文献中发现的基于三个模块的RPA设计相比,在决策过程中增加了一个数据词。所提出的设计包括四个模块,两个精确数据字和两个近似数据字(记为2E2A),其中E (A)代表精确(近似)数据字。分析了RPA在错误模块的一个和两个数据部分下生成输出精确数据字的概率;并给出了仿真结果。模拟概率和分析概率之间的差异最多为7.3%。通过仿真评估了所提出设计的优点(如延迟、功耗和面积),并与RPR和三模块RPA进行了比较。所提出的设计产生与三模块RPA相似的延迟;功耗和面积(由于额外的模块)可以通过增加近似位的数量来调整,同时仍然保持双模块的容错性。本文还介绍了它在图像处理、算术(即加法运算)中的应用;结果表明,所提出的方案是非常有效的。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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来源期刊
IEEE Transactions on Reliability
IEEE Transactions on Reliability 工程技术-工程:电子与电气
CiteScore
12.20
自引率
8.50%
发文量
153
审稿时长
7.5 months
期刊介绍: IEEE Transactions on Reliability is a refereed journal for the reliability and allied disciplines including, but not limited to, maintainability, physics of failure, life testing, prognostics, design and manufacture for reliability, reliability for systems of systems, network availability, mission success, warranty, safety, and various measures of effectiveness. Topics eligible for publication range from hardware to software, from materials to systems, from consumer and industrial devices to manufacturing plants, from individual items to networks, from techniques for making things better to ways of predicting and measuring behavior in the field. As an engineering subject that supports new and existing technologies, we constantly expand into new areas of the assurance sciences.
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