Lanthanum Oxide Surface Treatment to Form Diffusion Barrier and Interface Dipoles on Ferroelectric FET

Abstract

We propose a novel surface treatment technique using a few La ₂ O ₃ ALD cycles to improve the performance and reliability of FeFET-based non-volatile memory devices. The interfacial layer formed by a few La ₂ O ₃ ALD cycles prior to the deposition of the HfZrO (HZO) ferroelectric layer on the silicon substrate, acts as a diffusion barrier, reducing the number of trap sites in the gate stack. The La ₂ O ₃ interfacial layer also creates an imprint effect by forming interface dipoles between the HZO and Si. This reduces the switching voltage (V _sw ) and increases program efficiency. Compared to the conventional SiO ₂ interlayer (IL), this approach significantly improves performance and reliability, resulting in an increase in the memory window (MW) from 1.1 V to 2.4 V and an increase in electron mobility from 105 cm ² /V $\cdot $ s to 382 cm ² /V $\cdot $ s, compared to the control sample. Endurance of $3\times 10^{{7}}$ cycles and improved retention characteristics were also achieved.