{"title":"A 16.5-dBm D-Band Eight-Way Power Amplifier Utilizing Cascaded Transformers in 40-nm Bulk CMOS","authors":"Van-Son Trinh;Jeong-Moon Song;Jung-Dong Park","doi":"10.1109/LMWT.2024.3403950","DOIUrl":null,"url":null,"abstract":"We present a D-band eight-way power amplifier (PA), which achieves the saturated output power (\n<inline-formula> <tex-math>$P_{\\mathrm {sat}}$ </tex-math></inline-formula>\n) of 16.5 dBm in 40-nm bulk CMOS. The proposed D-band PA consists of four push-pull PA units with three stages, whose active device sizes are gradually tapered from the output to the input optimal power efficiency. A cascaded transformer-transformer (balun) structure was employed at the output of the PA unit to avoid self-resonance with an improved balun performance at the D-band. The power combiner/splitter is comprised of microstrip transmission lines (MSTLs) to combine the power of the four PA units in the current domain. The fabricated prototype has a chip size of 0.72 mm2 with a core size of 0.46-mm2 excluding pads. The measured PA achieved a power gain of 14.5 dB with the 3-dB gain bandwidth of 18 GHz (121–139 GHz), a peak PAE of 7.2%, and a saturated output power (\n<inline-formula> <tex-math>$P_{\\mathrm {sat}}$ </tex-math></inline-formula>\n) of 16.5 dBm, which demonstrates the highest output power among the recently reported D-band PAs in bulk CMOS.","PeriodicalId":73297,"journal":{"name":"IEEE microwave and wireless technology letters","volume":"34 8","pages":"1019-1022"},"PeriodicalIF":0.0000,"publicationDate":"2024-06-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE microwave and wireless technology letters","FirstCategoryId":"1085","ListUrlMain":"https://ieeexplore.ieee.org/document/10565986/","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"0","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0
Abstract
We present a D-band eight-way power amplifier (PA), which achieves the saturated output power (
$P_{\mathrm {sat}}$
) of 16.5 dBm in 40-nm bulk CMOS. The proposed D-band PA consists of four push-pull PA units with three stages, whose active device sizes are gradually tapered from the output to the input optimal power efficiency. A cascaded transformer-transformer (balun) structure was employed at the output of the PA unit to avoid self-resonance with an improved balun performance at the D-band. The power combiner/splitter is comprised of microstrip transmission lines (MSTLs) to combine the power of the four PA units in the current domain. The fabricated prototype has a chip size of 0.72 mm2 with a core size of 0.46-mm2 excluding pads. The measured PA achieved a power gain of 14.5 dB with the 3-dB gain bandwidth of 18 GHz (121–139 GHz), a peak PAE of 7.2%, and a saturated output power (
$P_{\mathrm {sat}}$
) of 16.5 dBm, which demonstrates the highest output power among the recently reported D-band PAs in bulk CMOS.