An 8 Gb/s Far-End Crosstalk Cancelation and FFE Co-Designed TX Output Driver

IF 2.2 Q3 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE IEEE Solid-State Circuits Letters Pub Date : 2024-08-06 DOI:10.1109/LSSC.2024.3439399
Guan-Yu Chen;Tai-Cheng Lee
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Abstract

This letter describes a single-ended transmitter (TX) output driver, which combines a feed-forward equalizer (FFE) and a far-end crosstalk (FEXT) canceller. The proposed output driver reduces the crosstalk-induced jitter (CIJ) between the two parallel coupled microstrip lines while preserving the inherent high-frequency boosting signal for the channel loss compensation. A prototype operating at a supply voltage of 0.9 V was fabricated in a 28-nm CMOS technology, occupying an area of $0.025~{\text {mm}^{2}}$ . This prototype reduces the peak-to-peak jitter and CIJ by 48% (29 ps) and 114%, respectively, at 8 Gb/s. Furthermore, it increases the horizontal eye-opening (BER < 1E-12) by 34%, with an energy efficiency of 1.08 pJ/bit/channel.
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8 Gb/秒远端串音消除和 FFE 协同设计 TX 输出驱动器
本文介绍了一种单端发射器(TX)输出驱动器,它结合了前馈均衡器(FFE)和远端串扰(FEXT)消除器。所提出的输出驱动器降低了两条平行耦合微带线之间的串扰诱导抖动(CIJ),同时保留了用于信道损耗补偿的固有高频升压信号。我们采用 28 纳米 CMOS 技术制作了工作电压为 0.9 V 的原型,占地面积为 0.025~{text {mm}^{2}}$。该原型在 8 Gb/s 速率下将峰峰抖动和 CIJ 分别降低了 48% (29 ps) 和 114%。此外,它还将水平开眼率(误码率 < 1E-12)提高了 34%,能效为 1.08 pJ/比特/信道。
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来源期刊
IEEE Solid-State Circuits Letters
IEEE Solid-State Circuits Letters Engineering-Electrical and Electronic Engineering
CiteScore
4.30
自引率
3.70%
发文量
52
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