A 250-Mb/s On-Chip Capacitive Digital Isolator With Adaptive Frequency Control

IF 2.2 Q3 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE IEEE Solid-State Circuits Letters Pub Date : 2024-08-06 DOI:10.1109/LSSC.2024.3439534
Dongfang Pan;Zhiyong Xiong;Qiming Lu;Fangting Miao;Litao Wu;Lin Cheng
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Abstract

In this letter, a fully integrated capacitive-coupled digital isolator is proposed. By utilizing the adaptive carrier frequency control (AFC) scheme, the power consumption at low data rate is significantly reduced while maintaining a maximum data rate of 250 Mb/s. The on-chip isolation capacitor provides 2.5-kVRMS isolation rating with compact silicon area. The transmitter (TX) and receiver (RX) are fabricated in a 180-nm CMOS technology. Measurement results show that the transmitter consumes 0.6 and 1.15 mA at 100 kb/s and 250 Mb/s, respectively.
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具有自适应频率控制功能的 250 Mb/s 片上电容式数字隔离器
本文提出了一种全集成电容耦合数字隔离器。通过利用自适应载波频率控制(AFC)方案,在保持 250 Mb/s 最高数据速率的同时,显著降低了低数据速率时的功耗。片上隔离电容器可提供 2.5 kVRMS 的隔离额定值,且硅片面积小。发送器(TX)和接收器(RX)采用 180 纳米 CMOS 技术制造。测量结果表明,发送器在 100 kb/s 和 250 Mb/s 时的功耗分别为 0.6 mA 和 1.15 mA。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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来源期刊
IEEE Solid-State Circuits Letters
IEEE Solid-State Circuits Letters Engineering-Electrical and Electronic Engineering
CiteScore
4.30
自引率
3.70%
发文量
52
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