{"title":"A fast hardware accelerator for nighttime fog removal based on image fusion","authors":"Tianyi Lv, Gaoming Du, Zhenmin Li, Xiaolei Wang, Peiyi Teng, Wei Ni, Yiming Ouyang","doi":"10.1016/j.vlsi.2024.102256","DOIUrl":null,"url":null,"abstract":"<div><p>In this paper, a fast hardware accelerator for defogging based on image fusion is proposed. This method overcomes the problem of model based defogging algorithms being unable to estimate atmospheric light in dark scenes, as well as the poor performance of learning based defogging algorithms at night. Through hardware implementation and optimization, while reducing system resources, it can meet the demand for real-time defogging. The entire algorithm consists of difference guided filtering, grayscale linear stretching, and image fusion. The difference oriented filtering algorithm can enhance edges by obtaining image information of bright and dark channels, and has better effects on night lighting. Gray-scale linear stretching can restore the overall brightness and edge information of the image, compensating for some halos and noise caused by difference guided filtering. Numerous experiments have shown that the proposed hardware accelerator for defogging performs best at night. It can also be used effectively during the day. In addition, it has the fastest processing speed, which can process the images with the size of 1920*1080 for 34.5fps in real time.</p></div>","PeriodicalId":54973,"journal":{"name":"Integration-The Vlsi Journal","volume":"99 ","pages":"Article 102256"},"PeriodicalIF":2.2000,"publicationDate":"2024-08-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Integration-The Vlsi Journal","FirstCategoryId":"5","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/S0167926024001202","RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE","Score":null,"Total":0}
引用次数: 0
Abstract
In this paper, a fast hardware accelerator for defogging based on image fusion is proposed. This method overcomes the problem of model based defogging algorithms being unable to estimate atmospheric light in dark scenes, as well as the poor performance of learning based defogging algorithms at night. Through hardware implementation and optimization, while reducing system resources, it can meet the demand for real-time defogging. The entire algorithm consists of difference guided filtering, grayscale linear stretching, and image fusion. The difference oriented filtering algorithm can enhance edges by obtaining image information of bright and dark channels, and has better effects on night lighting. Gray-scale linear stretching can restore the overall brightness and edge information of the image, compensating for some halos and noise caused by difference guided filtering. Numerous experiments have shown that the proposed hardware accelerator for defogging performs best at night. It can also be used effectively during the day. In addition, it has the fastest processing speed, which can process the images with the size of 1920*1080 for 34.5fps in real time.
期刊介绍:
Integration''s aim is to cover every aspect of the VLSI area, with an emphasis on cross-fertilization between various fields of science, and the design, verification, test and applications of integrated circuits and systems, as well as closely related topics in process and device technologies. Individual issues will feature peer-reviewed tutorials and articles as well as reviews of recent publications. The intended coverage of the journal can be assessed by examining the following (non-exclusive) list of topics:
Specification methods and languages; Analog/Digital Integrated Circuits and Systems; VLSI architectures; Algorithms, methods and tools for modeling, simulation, synthesis and verification of integrated circuits and systems of any complexity; Embedded systems; High-level synthesis for VLSI systems; Logic synthesis and finite automata; Testing, design-for-test and test generation algorithms; Physical design; Formal verification; Algorithms implemented in VLSI systems; Systems engineering; Heterogeneous systems.