Device Modeling Based on Cost-Sensitive Densely Connected Deep Neural Networks

IF 2.4 3区 工程技术 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC IEEE Journal of the Electron Devices Society Pub Date : 2024-08-21 DOI:10.1109/JEDS.2024.3447032
Xiaoying Tang;Zhiqiang Li;Lang Zeng;Hongwei Zhou;Xiaoxu Cheng;Zhenjie Yao
{"title":"Device Modeling Based on Cost-Sensitive Densely Connected Deep Neural Networks","authors":"Xiaoying Tang;Zhiqiang Li;Lang Zeng;Hongwei Zhou;Xiaoxu Cheng;Zhenjie Yao","doi":"10.1109/JEDS.2024.3447032","DOIUrl":null,"url":null,"abstract":"Engineers used TCAD tools for semiconductor devices modeling. However, it is computationally expensive and time-consuming for advanced devices with smaller dimensions. Therefore, this work proposes a machine learning-based device modeling algorithm to capture the complex nonlinear relationship between parameters and electrical characteristics of gate-all-around (GAA) nanowire field-effect transistors (NWFETs) from technology computer-aided design (TCAD) simulation results. This method utilizes a densely connected deep neural networks (DenseDNN), which establishes direct connections between layers in the neural networks, provides stronger feature extraction and information transmission capabilities. By incorporating cost-sensitive learning methods, the proposed model focus more on the critical data that determines device characteristics, leading to accurate prediction of key device characteristics under various parameters. Experimental results on a test dataset of 116 NWFETs demonstrate the effectiveness of this method. The DenseDNN model with cost-sensitive learning exhibits better performance than traditional deep neural networks (DNN) with various widths and depths, with a prediction error below 1.62%. Moreover, compared to TCAD simulation results, the model can speedup \n<inline-formula> <tex-math>$10^{6}\\times$ </tex-math></inline-formula>\n.","PeriodicalId":13210,"journal":{"name":"IEEE Journal of the Electron Devices Society","volume":"12 ","pages":"619-626"},"PeriodicalIF":2.4000,"publicationDate":"2024-08-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10643157","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Journal of the Electron Devices Society","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/10643157/","RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0

Abstract

Engineers used TCAD tools for semiconductor devices modeling. However, it is computationally expensive and time-consuming for advanced devices with smaller dimensions. Therefore, this work proposes a machine learning-based device modeling algorithm to capture the complex nonlinear relationship between parameters and electrical characteristics of gate-all-around (GAA) nanowire field-effect transistors (NWFETs) from technology computer-aided design (TCAD) simulation results. This method utilizes a densely connected deep neural networks (DenseDNN), which establishes direct connections between layers in the neural networks, provides stronger feature extraction and information transmission capabilities. By incorporating cost-sensitive learning methods, the proposed model focus more on the critical data that determines device characteristics, leading to accurate prediction of key device characteristics under various parameters. Experimental results on a test dataset of 116 NWFETs demonstrate the effectiveness of this method. The DenseDNN model with cost-sensitive learning exhibits better performance than traditional deep neural networks (DNN) with various widths and depths, with a prediction error below 1.62%. Moreover, compared to TCAD simulation results, the model can speedup $10^{6}\times$ .
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
基于成本敏感型密集连接深度神经网络的设备建模
工程师使用 TCAD 工具进行半导体器件建模。然而,对于尺寸较小的先进器件来说,这种方法计算成本高且耗时。因此,本研究提出了一种基于机器学习的器件建模算法,以从技术计算机辅助设计(TCAD)仿真结果中捕捉全栅极(GAA)纳米线场效应晶体管(NWFET)参数与电气特性之间复杂的非线性关系。该方法利用密集连接的深度神经网络(DenseDNN),在神经网络各层之间建立直接连接,提供更强的特征提取和信息传输能力。通过采用对成本敏感的学习方法,所提出的模型更加关注决定设备特性的关键数据,从而在各种参数下准确预测关键设备特性。在 116 个 NWFET 测试数据集上的实验结果证明了该方法的有效性。与具有不同宽度和深度的传统深度神经网络(DNN)相比,具有成本敏感学习的 DenseDNN 模型表现出更好的性能,预测误差低于 1.62%。此外,与 TCAD 仿真结果相比,该模型的速度提高了 10^{6}/times$ 。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 去求助
来源期刊
IEEE Journal of the Electron Devices Society
IEEE Journal of the Electron Devices Society Biochemistry, Genetics and Molecular Biology-Biotechnology
CiteScore
5.20
自引率
4.30%
发文量
124
审稿时长
9 weeks
期刊介绍: The IEEE Journal of the Electron Devices Society (J-EDS) is an open-access, fully electronic scientific journal publishing papers ranging from fundamental to applied research that are scientifically rigorous and relevant to electron devices. The J-EDS publishes original and significant contributions relating to the theory, modelling, design, performance, and reliability of electron and ion integrated circuit devices and interconnects, involving insulators, metals, organic materials, micro-plasmas, semiconductors, quantum-effect structures, vacuum devices, and emerging materials with applications in bioelectronics, biomedical electronics, computation, communications, displays, microelectromechanics, imaging, micro-actuators, nanodevices, optoelectronics, photovoltaics, power IC''s, and micro-sensors. Tutorial and review papers on these subjects are, also, published. And, occasionally special issues with a collection of papers on particular areas in more depth and breadth are, also, published. J-EDS publishes all papers that are judged to be technically valid and original.
期刊最新文献
Power Spectral Density of Thermal Noise at High Frequencies in Thermal Conductance for Semiconductor Devices Research on 4H-SiC Photoconductive Semiconductor Switch Employing Composite Anti-Reflection Coating Evaluation of Interface Traps Within Drift Region in LDMOS Using a Multi-Pulse Test Method Miller-Current Suppressing Technology for False Turn-On Protection of Commercial p-GaN HEMTs Memory Window Enhancement With Germanium-Incorporated Charge Trap Layer in Flash Memory Device
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:604180095
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1