Switching figure-of-merit, optimal design, and power loss limit of (ultra-) wide bandgap power devices: A perspective

Abstract

Power semiconductor devices are utilized as solid-state switches in power electronics systems, and their overarching design target is to minimize the conduction and switching losses. However, the unipolar figure-of-merit (FOM) commonly used for power device optimization does not directly capture the switching loss. In this Perspective paper, we explore three interdependent open questions for unipolar power devices based on a variety of wide bandgap (WBG) and ultra-wide bandgap (UWBG) materials: (1) What is the appropriate switching FOM for device benchmarking and optimization? (2) What is the optimal drift layer design for the total loss minimization? (3) How does the device power loss compare between WBG and UWBG materials? This paper starts from an overview of switching FOMs proposed in the literature. We then dive into the drift region optimization in 1D vertical devices based on a hard-switching FOM. The punch-through design is found to be optimal for minimizing the hard-switching FOM, with reduced doping concentration and thickness compared to the conventional designs optimized for static FOM. Moreover, we analyze the minimal power loss density for target voltage and frequency, which provides an essential reference for developing device- and package-level thermal management. Overall, this paper underscores the importance of considering switching performance early in power device optimization and emphasizes the inevitable higher density of power loss in WBG and UWBG devices despite their superior performance. Knowledge gaps and research opportunities in the relevant field are also discussed.