{"title":"A 3D-stack DRAM-based PNM architecture design","authors":"Qiang Zhou , Bing Wang , XinTing Xiao","doi":"10.1016/j.vlsi.2024.102266","DOIUrl":null,"url":null,"abstract":"<div><p>The article examines methods for integrating 3D-stacked DRAM with AI logic chips, in order to overcome the memory bandwidth challenges faced in the AI inference of transformer models. The findings indicate that this approach can yield a 9x to 3x reduction in power consumption while maintaining similar performance levels, or alternatively, an 8x improvement in performance with comparable power consumption.</p></div>","PeriodicalId":54973,"journal":{"name":"Integration-The Vlsi Journal","volume":"100 ","pages":"Article 102266"},"PeriodicalIF":2.2000,"publicationDate":"2024-09-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Integration-The Vlsi Journal","FirstCategoryId":"5","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/S0167926024001305","RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE","Score":null,"Total":0}
引用次数: 0
Abstract
The article examines methods for integrating 3D-stacked DRAM with AI logic chips, in order to overcome the memory bandwidth challenges faced in the AI inference of transformer models. The findings indicate that this approach can yield a 9x to 3x reduction in power consumption while maintaining similar performance levels, or alternatively, an 8x improvement in performance with comparable power consumption.
期刊介绍：
Integration''s aim is to cover every aspect of the VLSI area, with an emphasis on cross-fertilization between various fields of science, and the design, verification, test and applications of integrated circuits and systems, as well as closely related topics in process and device technologies. Individual issues will feature peer-reviewed tutorials and articles as well as reviews of recent publications. The intended coverage of the journal can be assessed by examining the following (non-exclusive) list of topics:
Specification methods and languages; Analog/Digital Integrated Circuits and Systems; VLSI architectures; Algorithms, methods and tools for modeling, simulation, synthesis and verification of integrated circuits and systems of any complexity; Embedded systems; High-level synthesis for VLSI systems; Logic synthesis and finite automata; Testing, design-for-test and test generation algorithms; Physical design; Formal verification; Algorithms implemented in VLSI systems; Systems engineering; Heterogeneous systems.
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